GS33 trainer.bin A0600000-A0700000 allocated memory table 8078040C p->active codelist (A07E9D60) 80780800 ADDIU SP,SP,FFE8 LUI A0,BE00 ;A0=BE000000 GS ROM SW RA,0014 (SP) JAL 80788000 ;set hardware addy -> A0; save root (0E) to cur.addy+400 SW S0,0010 (SP) LUI V0,0040 LUI AT,A000 SW V0,0318 (AT) ;4MB->A0000318 detected size of RAM JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP LUI V1,A07E ORI V1,V1,9C00 ;V1=A07E9C00 LUI A0,A07C ORI A0,A0,9C00 ;A0=A07C9C00 LUI A2,A07E ORI A2,A2,9C00 ;A2=A07E9C00 ADDU A1,R0,R0 ;A1=0 init.count LUI V0,807A SW V1,9E10 (V0) ;A07E9C00->80799E10: p->codegen runtime data LUI V0,807A SW A0,9DF8 (V0) ;A07C9C00->80799DF8: //80780854: initialize codegen and active codelist region ADDU V0,A2,A1 ;V0=A07E9C00+offset SB R0,0000 (V0) ;0->A07E9C00+offset: initialize memory ADDIU A1,A1,0001 ;A1++ count++ SLTIU V0,A1,0168 BNE V0,R0,80780858 ;loop 360 times ADDU V0,A2,A1 ;V0=A07E9C00+offset //8078086C: set codegen runtime data values LUI A0,A060 ;A0=A0600000: start of table JAL 80785C30 ;set dynamic memory table from A0 to A1 LUI A1,A070 ;A1=A0700000: end of table JAL 8078EF74 LUI S0,807A LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LUI V1,807A SW R0,B1D0 (V1) ;0->8079B1D0: ADDIU V0,V0,0160 ;V0+=160: p->#active codes LUI AT,A078 SW V0,040C (AT) ;V0->A078040C: p->active codelist data JAL 80790B74 ;initialize ??? in codegen runtime data NOP LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU V1,V0,0164 ;V1=V0+164: p->active codes SW V1,0000 (V0) ;V1->codegen.data+0: p->active codelist LW A0,0000 (V0) ;A0=p->active codelist ADDIU V1,V0,02AC ;V1=codegen.data+2AC: p->code search result addresses SW V1,00C8 (V0) ;V1->codegen.data+C8: p->code search result addresses SW A0,00CC (V0) ;A0->codegen.data+CC: p->active codelist ADDIU A0,V1,0194 ;A0=search results+194: ??? [A07EA040] ADDIU V1,V1,0238 ;V1+=238: ??? [A07EA0E4] SW A0,00D0 (V0) ;A0->codegen.data+D0: JAL 80794A80 ;copy 80794AEC to A0000180 and set watch SW V1,00D4 (V0) ;V1->codegen.data+D4: LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 807808E0 set short# A0 in current GS ROM bank to A1 accepts: A0=short#, A1=short ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A1,R0 ;S1=A1: data LUI V1,0001 ORI V1,V1,FFFE ;V1=1FFFE LUI V0,807A SW S0,0010 (SP) LW S0,9D04 (V0) ;S0=80799D04: hardware bank LUI V0,00E0 SW RA,0018 (SP) OR S0,S0,V0 ;S0=E00000 | bank: GS ROM bank ANDI V0,A0,0001 ;V0=offset&1: F0 bank flag SLL V0,V0,0x14 ;V0=flag * 100000: switch between F0 and E0 bank for mirroring issue OR S0,S0,V0 ;S0=E00000 | 100000 | bank AND A0,A0,V1 ;A0&=1FFFE: limit offset SLL A0,A0,0x1 ;A0*=2: A0->word offset (3FFFC) JAL 80788050 ;wait for PI Status clear OR S0,S0,A0 ;S0=E00000 | 100000 | bank | 3FFFC: hardware address within GS ROM domain SLL S1,S1,0x10 ;S1*=10000: set short in upper half of word JAL 80788050 ;wait for PI Status clear SW S1,0000 (S0) ;S1->hardware LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80780948 V0=short# A0 in GS ROM A0=short# ADDIU SP,SP,FFE0 LUI A1,0001 ORI A1,A1,FFFE ;A1=1FFFE LUI V0,807A LW V1,9D04 (V0) ;V1=80799D04: hardware bank LUI V0,00E0 SW S0,0010 (SP) ANDI S0,A0,0001 ;S0=offset&1: F0 bank flag AND A0,A0,A1 ;A0&=1FFFE: limit offset SLL A0,A0,0x1 ;A0*=2: A0->word offset (3FFFC) SW RA,0018 (SP) SW S1,0014 (SP) OR S1,V1,V0 ;S1=V1|V0: bank | E0000000 SLL V0,S0,0x14 ;V0=flag * 100000: switch between F0 and E0 bank for mirroring issue OR S1,S1,V0 ;S1|=V0: bank | E00000 | 100000 JAL 80788050 ;wait for PI Status clear OR S1,S1,A0 ;S1|=A0: bank | E00000 | 100000 | offset hardware address LW S1,0000 (S1) ;S1=S1+0: word at hardware address BEQL S0,R0,80780998 ;if lower short, S1/=10000 SRA S1,S1,0x10 //80780998: wait for PI to clear JAL 80788050 ;wait for PI Status clear ANDI S1,S1,FFFF ;S1&=FFFF: S1->short ADDU V0,S1,R0 ;V0=S1: short at offset A0 //807809A4: return LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 807809B8 wait until sync acquired ADDIU SP,SP,FFE8 ADDIU V0,R0,03E7 ;V0=999 SW RA,0014 (SP) SW S0,0010 (SP) ADDIU V0,V0,FFFF ;V0-- //807809CC: wait for arbitrary length of time BGEZ V0,807809CC ;loop 1000 times ADDIU V0,V0,FFFF ;V0-- //807809D4: pull same address off GS ROM twice and test accuracy JAL 80780948 ;V0=short# A0 in GS ROM ADDU A0,R0,R0 ;A0=0 ADDU A0,R0,R0 ;A0=0 JAL 80780948 ;V0=short# A0 in GS ROM ANDI S0,V0,4040 ;S0&=4040 ANDI V0,V0,4040 ;V0&=4040 BNE S0,V0,807809D4 ;loop until equal NOP //807809F4: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80780A04 copy A2 bytes from A1 to GS ROM offset A0 accepts: A0=hardware offset, A1=p->source, A2=count (should be cluster of 0x100 bytes) ADDIU SP,SP,FFD8 SW S3,001C (SP) ADDU S3,A0,R0 ;S3=A0: hardware offset SW S2,0018 (SP) ADDU S2,A2,R0 ;S2=A2: count SW S1,0014 (SP) ADDU S1,A1,R0 ;S1=A1: p->source SW RA,0024 (SP) SW S4,0020 (SP) JAL 80787AE8 ;V0=COP0 Status SW S0,0010 (SP) ADDU S4,V0,R0 ;S4=V0: org.status ADDIU A0,R0,FFFE JAL 80787AF4 ;A0->COP0 Status AND A0,S4,A0 ;A0&=FFFFFFFE ADDIU S2,S2,00FF ;S2+=FF count rounded up to nearest 0x100 SRA S2,S2,0x8 ;S2/100: S2=#0x100 segments JAL 807809B8 ;wait until sync acquired SRA S3,S3,0x1 ;S3/=2: offset->short# BEQ S2,R0,80780AC0 ;if count 0, reset status and return //80780A54: init. static values in GS ROM ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ORI A1,R0,AAAA ;A1=AAAA ADDIU A0,R0,2AAA ;A0=2AAA: 1EE05554 JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ADDIU A1,R0,5555 ;A1=5555 ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ORI A1,R0,A0A0 ;A1=A0A0 ADDU S0,R0,R0 ;S0=0 init.count //80780A7C: loop to copy 0x100 bytes to ROM LBU A1,0000 (S1) ;A1=S1+0: byte ADDIU S1,S1,0001 ;S1++ LBU V0,0000 (S1) ;A1=S1+1: next byte ADDIU S1,S1,0001 ;S1++ ADDU A0,S3,R0 ;A0=S3: short# ADDIU S3,S3,0001 ;S3++ short#++ ADDIU S0,S0,0001 ;S0++ count++ SLL A1,A1,0x8 JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 OR A1,A1,V0 ;A1|=V0: short from source SLTI V0,S0,0080 BNE V0,R0,80780A7C ;loop 0x80 times, copying 0x100 bytes NOP JAL 807809B8 ;wait until sync acquired ADDIU S2,S2,FFFF ;S2-- count-- BNE S2,R0,80780A58 ;loop count times ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA //80780AC0: set org. status JAL 80787AF4 ;A0->COP0 Status ADDU A0,S4,R0 ;A0=S4: org.status //80780AC8: return LW RA,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80780AE8 ADDIU SP,SP,FFE0 SW S2,0018 (SP) ADDU S2,A1,R0 SW S1,0014 (SP) ADDIU S1,A2,00FF ADDIU V0,R0,FF00 AND S1,S1,V0 LUI V1,00C0 LUI V0,807A LW V0,9D04 (V0) OR A0,A0,V1 SW RA,001C (SP) SW S0,0010 (SP) BEQ S1,R0,80780B50 OR S0,A0,V0 ADDU A0,S0,R0 JAL 8078EDD0 ADDIU S0,S0,0001 LBU V1,0000 (S2) BEQ V0,V1,80780B44 ADDIU S2,S2,0001 J 80780B54 ADDIU V0,R0,FFFF ADDIU S1,S1,FFFF BNE S1,R0,80780B28 ADDU A0,S0,R0 ADDU V0,R0,R0 LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80780B6C ADDIU SP,SP,FFE0 SW S2,0018 (SP) ADDU S2,A1,R0 SW S1,0014 (SP) ADDIU S1,A2,00FF ADDIU V0,R0,FF00 AND S1,S1,V0 LUI V1,00C0 LUI V0,807A LW V0,9D04 (V0) OR A0,A0,V1 SW RA,001C (SP) SW S0,0010 (SP) BEQ S1,R0,80780BC4 OR S0,A0,V0 ADDU A0,S0,R0 JAL 8078EDD0 ADDIU S0,S0,0001 SB V0,0000 (S2) ADDIU S1,S1,FFFF BNE S1,R0,80780BA8 ADDIU S2,S2,0001 LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80780BDC ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 807809B8 ;wait until sync acquired NOP ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ORI A1,R0,AAAA ;A1=AAAA ADDIU A0,R0,2AAA ;A0=2AAA: 1EE05554 JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ADDIU A1,R0,5555 ;A1=5555 ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ORI A1,R0,8080 ;A1=8080 ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ORI A1,R0,AAAA ;A1=AAAA ADDIU A0,R0,2AAA ;A0=2AAA: 1EE05554 JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ADDIU A1,R0,5555 ;A1=5555 ADDIU A0,R0,5555 ;A0=5555: 1EF0AAAA JAL 807808E0 ;set short# A0 in current GS ROM bank to A1 ADDIU A1,R0,1010 ;A1=1010 JAL 807809B8 ;wait until sync acquired NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80780C48 likely fill ;9DC395EE 1FC688BE 80780C50 save A0 to cur.hardware + 800 accepts: A0=value ADDIU SP,SP,FFE8 ADDU A1,A0,R0 ;A1=A0: value SW RA,0010 (SP) JAL 80787FBC ;save A1 to cur.hardware + offset A0 ADDIU A0,R0,0800 ;A0=800 JAL 80787C0C ;loop 190 times NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80780C78 V0=bitsample for displaying A0 to LCD screen or FF if none found accepts: A0=char LUI V1,8079 LBU V0,5910 (V1) ;V0=80795910: p->table ADDIU A2,R0,00FF ;A2=FF BEQ V0,A2,80780CC4 ;return FF if V0=FF ADDU A1,R0,R0 ;A1=0 ANDI A0,A0,00FF ;A0->byte ADDU T0,A2,R0 ;T0=A2: FF ADDIU A3,V1,5910 ;A3=V1: 80795910 ADDU V1,A3,R0 ;V1=A3: 80795910 LBU V0,0000 (V1) ;V0=byte //80780CA0: BNE V0,A0,80780CB8 ;branch if byte doesn't match search value ADDIU V1,V1,0002 ;V1+=2: next byte ADDU V0,A1,A3 ;V0=A1+A3: 80795910+offset LBU A2,0001 (V0) ;A2=value for matching entry JR RA ADDU V0,A2,R0 ;V0=A2: value //80780CB8: loop through table LBU V0,0000 (V1) ;V0=byte BNE V0,T0,80780CA0 ;loop until FF found ADDIU A1,A1,0002 ;A1+=2: offset //80780CC4: return not found ADDU V0,A2,R0 ;V0=A2: FF JR RA NOP 80780CD0 display A0 to LCD screen accepts: A0=char ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: char ADDIU A0,R0,0600 ;A0=0600: Ack | Busy, maybe? SW RA,001C (SP) SW S2,0018 (SP) JAL 80787C64 ;save A0 to cur.hardware + 600 SW S1,0014 (SP) JAL 80780C78 ;V0=bitsample for displaying A0 to LCD screen or FF if none found ANDI A0,S0,00FF ;A0=S0&FF: A0=char LUI V1,0001 OR S1,V0,V1 ;S1=char | 10000: bitpattern SLTI V0,S1,0101 BNE V0,R0,80780D54 ;never, ever branch LUI S2,0400 ORI S2,S2,0400 ;S2=04000400 ANDI V0,S1,0001 ;V0=bit //80780D14: select data to send BEQ V0,R0,80780D24 ;if bit not set, send 0 ADDU S0,R0,R0 ;S0=0 LUI S0,0200 ORI S0,S0,0200 ;S0=02000200: bit set //80780D24: JAL 80780C50 ;save A0 to cur.hardware + 800 ADDU A0,S0,R0 ;A0=S0: data JAL 80780C50 ;save A0 to cur.hardware + 800 OR A0,S0,S2 ;A0=data | 04000400 JAL 80780C50 ;save A0 to cur.hardware + 800 ADDU A0,S0,R0 ;A0=S0: data SRL V0,S1,0x1F ;V0=nonzero if negative, which I don't think it can be ADDU V0,S1,V0 ;V0+=pattern: increment if negative SRA S1,V0,0x1 ;S1=pattern/2: next bit SLTI V0,S1,0101 BEQ V0,R0,80780D14 ;loop about 8 times ANDI V0,S1,0001 ;V0=S1&1: bit //80780D54: JAL 80787C64 ;save A0 to cur.hardware + 600 ADDIU A0,R0,0200 ;A0=0200 LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80780D74 redirect to 80780CD0 accepts: A0=(byte) command ID ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80780CD0 ;display A0 to LCD screen ANDI A0,A0,00FF ;A0->byte LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80780D90 unconditional return JR RA NOP 80780D98 V0=80795950: prev.w.LCD LUI V0,8079 LW V0,5950 (V0) ;V0=80795950: prev.w.LCD JR RA NOP 80780DA8 A0->LCD controller and prev.w.LCD register accepts: A0=value, should be of format [A0.A0.A0.A0] LUI V0,8079 SW A0,5950 (V0) ;A0->80795950: prev.w.LCD LUI AT,BE60 SW A0,FFFC (AT) ;A0->BE5FFFFC: LCD controller JR RA NOP 80780DC0 loop A0 * 65535 times accepts: A0=count BEQ A0,R0,80780DE8 ;return if A0 zero ORI A1,R0,FFFF ;A1=65535 ADDU V1,R0,R0 ;V1=0 init.count //80780DCC: loop 65535 times ADDIU V1,V1,0001 ;V1++ SLT V0,A1,V1 BEQL V0,R0,80780DD0 ;loop 65535 times ADDIU V1,V1,0001 ADDIU A0,A0,FFFF ;A0-- BNE A0,R0,80780DCC ;loop A0 times ADDU V1,R0,R0 ;V1=0 init.count //80780DE8: return JR RA NOP 80780DF0 blink dot on LCD display ADDIU SP,SP,FFE8 SW RA,0014 (SP) JAL 80780D98 ;V0=80795950: prev.w.LCD SW S0,0010 (SP) LUI V1,7F7F ORI V1,V1,7F7F AND S0,V0,V1 ;S0=prev.w.LCD & 7F7F7F7F: remove dot in corner JAL 80780DA8 ;A0->LCD and prev.w.LCD register ADDU A0,S0,R0 ;A0=S0: LCD bitflags JAL 80780DC0 ;loop A0 * 65535 times ADDIU A0,R0,0001 ;A0=1 time LUI A0,8080 ORI A0,A0,8080 JAL 80780DA8 ;A0->LCD and prev.w.LCD register OR A0,S0,A0 ;A0|=S0: display dot JAL 80780DC0 ;loop A0 * 65535 times ADDIU A0,R0,0064 ;A0=100 LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80780E44 set or unset (A0) sequence of LR,LR,UR,LR on LCD screen accepts: A0=mode (0-light; 1-unlight) ADDIU SP,SP,FFE8 SW S0,0010 (SP) SW RA,0014 (SP) JAL 80780D98 ;V0=80795950: prev.w.LCD ADDU S0,A0,R0 ;S0=A0: mode LUI V1,BFBF ORI V1,V1,DFBF BEQ S0,R0,80780E74 ;branch if mode "light" AND A0,V0,V1 ;A0=V0|BFBFDFBF: unmask and light LR,LR,UR,LR LUI V0,4040 ORI V0,V0,2040 OR A0,A0,V0 ;A0|=40402040: LR,LR,UR,LR //80780E74: save updated value JAL 80780DA8 ;A0->LCD and prev.w.LCD register NOP LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80780E8C set or unset (A0) sequence of UR,UR,LR,UR on LCD screen accepts: A0=mode (0-light; 1-unlight) ADDIU SP,SP,FFE8 SW S0,0010 (SP) SW RA,0014 (SP) JAL 80780D98 ;V0=80795950: prev.w.LCD ADDU S0,A0,R0 ;S0=A0: mode LUI V1,DFDF ORI V1,V1,BFDF BEQ S0,R0,80780EBC ;branch if mode "light" AND A0,V0,V1 ;A0=V0&DFDFBFDF: unmask and light UR,UR,LR,UR LUI V0,2020 ORI V0,V0,4020 OR A0,A0,V0 ;A0|=20204020: unlight UR,UR,LR,UR //80780EBC: save updated value JAL 80780DA8 ;A0->LCD and prev.w.LCD register NOP LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80780ED4 V0=value at cur.hardware ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80787F80 ;V0=value at cur.hardware + offset A0 ADDU A0,R0,R0 ;A0=0 no offset LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80780EF0 waits until 00400040 set/unset (A0) at cur.hardware accepts: A0=mode (0-unset; 1-set) ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,R0,R0 ;S0=0 test unset SW RA,0018 (SP) BEQ A0,R0,80780F10 ;mode 0 tests unset SW S1,0014 (SP) LUI S0,0040 ORI S0,S0,0040 ;S0=00400040: test set //80780F10: mask for detecting state LUI S1,0040 ORI S1,S1,0040 ;S1=00400040 //80780F18: loop until match JAL 80780ED4 ;V0=value at cur.hardware NOP AND V0,V0,S1 ;V0&=00400040: flag state BNE V0,S0,80780F18 ;loop until test value same as actual NOP //80780F2C: return LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80780F40 ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 SW S1,0014 (SP) ADDU S1,R0,R0 SW RA,0018 (SP) JAL 80780E44 ;set or unset (A0) sequence of LR,LR,UR,LR on LCD screen ADDIU A0,R0,0001 JAL 80780E8C ;set or unset (A0) sequence of UR,UR,LR,UR on LCD screen ANDI A0,S0,0080 SLL S0,S0,0x1 JAL 80780EF0 ;waits until 00400040 set/unset (A0) at cur.hardware ADDIU A0,R0,0001 ;A0=test if set JAL 80780E44 ;set or unset (A0) sequence of LR,LR,UR,LR on LCD screen ADDU A0,R0,R0 JAL 80780EF0 ;waits until 00400040 set/unset (A0) at cur.hardware ADDU A0,R0,R0 ;A0=test if unset ADDIU S1,S1,0001 SLTI V0,S1,0008 BNE V0,R0,80780F58 NOP LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80780FA8 V0=count of hardware transfers; alternates LCD download display ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,R0,R0 ;S0=0 init.count SW S1,0014 (SP) ADDU S1,S0,R0 ;S1=S0: 0 SW S2,0018 (SP) LUI S2,0020 ORI S2,S2,0020 ;S2=00200020 SW RA,001C (SP) SLL S0,S0,0x1 ;S0*=2 //80780FD0: play with LCD display and pull a value from hardware ANDI S0,S0,00FF ;S0->byte JAL 80780EF0 ;waits until 00400040 set/unset (A0) at cur.hardware ADDIU A0,R0,0001 ;A0=test if set JAL 80780E44 ;set or unset (A0) sequence of LR,LR,UR,LR on LCD screen ADDIU A0,R0,0001 ;A0=set JAL 80780EF0 ;waits until 00400040 set/unset (A0) at cur.hardware ADDU A0,R0,R0 ;A0=test if unset JAL 80780ED4 ;V0=value at cur.hardware NOP AND V0,V0,S2 ;V0&=00200020: ??? BNEL V0,R0,80781000 ;if flags set, inc.count ORI S0,S0,0001 ;S0++ //80781000: loop eight times JAL 80780E44 ;set or unset (A0) sequence of LR,LR,UR,LR on LCD screen ADDU A0,R0,R0 ;A0=unset ADDIU S1,S1,0001 ;S1++ SLTI V0,S1,0008 BNEL V0,R0,80780FD0 ;loop 8 times SLL S0,S0,0x1 ;S0*2: advance a bit //80781018: return ADDU V0,S0,R0 ;V0=S0: count LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80781034 V0=FALSE if port acknowledgement timeout ADDIU SP,SP,FFD8 SW RA,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) JAL 80780DF0 ;blink dot on LCD display SW S0,0010 (SP) JAL 80780ED4 ;V0=value at cur.hardware ADDIU S0,R0,00AE ;S0=AE: sends 1010111001010001 LUI V1,0020 ORI V1,V1,0020 ;V1=00200020 AND S4,V0,V1 ;S4=original flag state ADDU S1,R0,R0 ;S1=0 init.count LUI S3,0020 ORI S3,S3,0020 ;S3=00200020 LUI S2,0FFF ORI S2,S2,FFFF ;S2=0FFFFFFF //8078107C: alternate sequence JAL 80780E44 ;set or unset (A0) sequence of LR,LR,UR,LR on LCD screen ADDIU A0,R0,0001 ;A0=set ANDI A0,S0,0080 ;A0=nonzero if bit set BEQ A0,R0,80781094 ;branch if leading bit set SLL S0,S0,0x1 ;S0*=2: next bit ORI S0,S0,0001 ;S0|=1: set lowest bit //80781094: JAL 80780E8C ;set or unset (A0) sequence of UR,UR,LR,UR on LCD screen ANDI S0,S0,00FF ;S0->byte JAL 80780DC0 ;loop A0 * 65535 times ADDIU A0,R0,0001 ;A0=1 time JAL 80780E44 ;set or unset (A0) sequence of LR,LR,UR,LR on LCD screen ADDU A0,R0,R0 ;A0=unset JAL 80780DC0 ;loop A0 * 65535 times ADDIU A0,R0,0001 ;A0=1 time JAL 80780ED4 ;V0=value at cur.hardware NOP AND V0,V0,S3 ;V0&=00200020: cur.flag state BNE V0,S4,807810D8 ;branch if flag state changed LUI V0,0FFF ADDIU S1,S1,0001 ;S1++ count++ SLT V0,S2,S1 ;TRUE if FFFFFFF < count BEQ V0,R0,8078107C ;loop a whole stinking lot... //807810D4: return when state changes, for the most part LUI V0,0FFF ORI V0,V0,FFFF SLT V0,V0,S1 ;TRUE if 0FFFFFFF < S1: timeout LW RA,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) XORI V0,V0,0001 ;V0^=1 return FALSE on timeout JR RA ADDIU SP,SP,0028 80781104 ORI A2,R0,FFFF BLEZ A1,80781164 ADDU T1,R0,R0 ADDIU A3,R0,000F ADDU V0,A0,T1 LBU V1,0000 (V0) LBU V0,0001 (V0) SLL V1,V1,0x8 OR V1,V1,V0 ANDI T0,A2,8000 ANDI V0,V1,8000 BEQ V0,R0,8078113C SLL A2,A2,0x1 ORI A2,A2,0001 BEQ T0,R0,80781148 SLL V1,V1,0x1 XORI A2,A2,8005 ADDIU A3,A3,FFFF BGEZ A3,80781128 ANDI A2,A2,FFFF ADDIU T1,T1,0002 SLT V0,T1,A1 BNE V0,R0,80781114 ADDIU A3,R0,000F JR RA ADDU V0,A2,R0 8078116C ADDIU SP,SP,FFD8 ADDU A1,A0,R0 ADDIU A0,SP,0010 SW S1,001C (SP) ADDU S1,R0,R0 SW S0,0018 (SP) ADDU S0,A0,R0 SRL V0,A1,0x18 SB V0,0012 (SP) SRL V0,A1,0x10 SB V0,0013 (SP) LUI V0,8079 LUI V1,8079 LBU A2,5957 (V0) LBU V1,595B (V1) SRL V0,A1,0x8 SB A1,0015 (SP) ADDIU A1,R0,0006 SW RA,0020 (SP) SB V0,0014 (SP) SB A2,0010 (SP) JAL 80781104 SB V1,0011 (SP) SRL V1,V0,0x8 SB V1,0016 (SP) SB V0,0017 (SP) ADDU V0,S0,S1 LBU A0,0000 (V0) JAL 80780F40 ADDIU S1,S1,0001 SLTI V0,S1,0008 BNE V0,R0,807811D8 ADDU V0,S0,S1 JAL 80780DC0 ;loop A0 * 65535 times ADDIU A0,R0,000A ;A0=10 times ADDU S0,R0,R0 ADDU S1,S0,R0 JAL 80780FA8 ;V0=count of hardware transfers; alternates LCD download display SLL S0,S0,0x8 OR S0,S0,V0 ADDIU S1,S1,0001 SLTI V0,S1,0004 BNE V0,R0,80781200 ADDU V0,S0,R0 LW RA,0020 (SP) LW S1,001C (SP) LW S0,0018 (SP) JR RA ADDIU SP,SP,0028 80781230 test for and set PC acknowledgement flag loops infinitely on timeout! LUI V0,8079 LW V0,595C (V0) ;V0=8079595C: TRUE on PC ack ADDIU SP,SP,FFE8 BNE V0,R0,8078125C ;if 8079595C already nonzero don't check timeout SW RA,0010 (SP) JAL 80781034 ;V0=FALSE if port acknowledgement timeout NOP BNE V0,R0,80781260 ;branch if didn't timeout LUI V1,8079 //80781254: loop indefinately! J 80781254 NOP //8078125C: set 8079595C to 1 LUI V1,8079 LW RA,0010 (SP) ADDIU V0,R0,0001 SW V0,595C (V1) ;1->8079595C: PC ack JR RA ADDIU SP,SP,0018 80781274 ADDIU SP,SP,FFE0 LUI A0,6962 ORI A0,A0,A1B4 SW S1,0014 (SP) LUI S1,8079 ADDIU V0,R0,0002 SW S0,0010 (SP) LUI S0,8079 SW RA,0018 (SP) SW V0,5954 (S1) JAL 8078116C SW V0,5958 (S0) LUI V1,0455 ORI V1,V1,4321 BNE V0,V1,807812C4 ADDIU V0,R0,0001 ADDU V0,R0,R0 ADDIU V1,R0,0001 SW V1,5954 (S1) SW V1,5958 (S0) LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 807812D8 SW V0,0130 (V1) LW RA,0014 (SP) LW T7,0010 (SP) SLL T7,T7,0x1 ADDI A3,A3,FFFF ADDU T0,A0,R0 ADD A0,A0,T7 ADDU T1,A1,R0 ADDI A1,A1,0280 ADDU T2,A2,R0 LH V0,0000 (T0) ADDI T0,T0,0002 BEQ V0,R0,80781314 ADDI T2,T2,FFFF SH V0,0000 (T1) BNE T2,R0,80781300 ADDI T1,T1,0002 BNE A3,R0,807812EC ADDI A3,A3,FFFF JR RA NOP 8078132C ADDI SP,SP,FFFC SW S0,0000 (SP) ADDI SP,SP,FFFC SW S1,0000 (SP) ADDI SP,SP,FFFC SW S6,0000 (SP) ADDI SP,SP,FFFC SW S7,0000 (SP) ADDIU S0,R0,0500 MULT A1,S0 MFLO S0 LUI A1,807A LW A1,B238 (A1) ADDIU S6,R0,002F ADD A1,A1,S0 ADD A0,A0,A0 ADD A1,A1,A0 LUI S0,DFFF ORI S0,S0,FFF8 AND A2,A2,S0 LD S0,0000 (A2) LD S1,0008 (A2) SD S0,0000 (A1) LD S0,0010 (A2) SD S1,0008 (A1) LD S1,0018 (A2) SD S0,0010 (A1) LD S0,0020 (A2) SD S1,0018 (A1) LD S1,0028 (A2) SD S0,0020 (A1) LD S0,0030 (A2) SD S1,0028 (A1) LD S1,0038 (A2) SD S0,0030 (A1) LD S0,0040 (A2) SD S1,0038 (A1) LD S1,0048 (A2) SD S0,0040 (A1) LD S0,0050 (A2) SD S1,0048 (A1) LD S1,0058 (A2) SD S0,0050 (A1) LD S0,0060 (A2) SD S1,0058 (A1) LD S1,0068 (A2) SD S0,0060 (A1) LD S0,0070 (A2) SD S1,0068 (A1) LD S1,0078 (A2) SD S0,0070 (A1) SD S1,0078 (A1) ADDI A1,A1,0500 ADDI A2,A2,0080 BNE S6,R0,8078137C ADDI S6,S6,FFFF LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP 80781434 data or fill ;AND V0,S2,V0 ;BEQ V0,R0,8078145C ;LUI V0,0100 80781440 V0=p->next entry in A0 or NULL if beyond 806DA000 accepts: A0=p->??? pointer table LUI V1,806D ORI V1,V1,A000 ;V1=806DA000 ADDIU A0,A0,0004 ;A0+=4 SLT V1,A0,V1 BEQ V1,R0,8078145C ;return if A0>=806DA000 ADDU V0,R0,R0 ;V0=NULL ADDU V0,A0,R0 ;V0=A0: p->next entry in pointer table //8078145C: return JR RA NOP 80781464 unconditional return JR RA NOP 8078146C unconditional return JR RA NOP 80781474 unconditional return JR RA NOP 8078147C ADDIU SP,SP,FFC8 ADDU A1,A0,R0 LUI V1,807A LW V0,9E10 (V1) ;V0=80799E10: p->codegen runtime data LUI A0,8040 SW RA,0030 (SP) SW S7,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) LW S1,00EC (V0) SW S1,00BC (V0) LW V0,00F0 (V0) BEQ S1,R0,8078152C ADDU S3,R0,R0 SLL V0,V0,0x10 SRA S4,V0,0x10 ADDIU S5,R0,0064 ADDU S6,V1,R0 ADDIU S7,R0,0065 ADDU S2,A1,R0 LW S0,0000 (A0) JAL 80781440 NOP ADDU A0,V0,R0 BEQ A0,R0,8078152C NOP LH V0,0000 (S0) BNEL V0,S4,80781524 ADDIU S1,S1,FFFF SW S0,0000 (S2) ADDIU S3,S3,0001 BNE S3,S5,80781520 ADDIU S2,S2,0004 LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data J 8078152C SW S7,00BC (V0) ADDIU S1,S1,FFFF BNE S1,R0,807814E0 NOP LW RA,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80781558 ADDIU SP,SP,FFD8 ADDU A2,A0,R0 SW S0,0010 (SP) LUI S0,8000 SW S1,0014 (SP) ADDU S1,S0,R0 LUI V0,807A LW V1,9E10 (V0) ;V0=80799E10: p->codegen runtime data LUI A0,8040 SW S2,0018 (SP) ADDU S2,R0,R0 SW RA,0020 (SP) SW S3,001C (SP) LW V0,00E8 (V1) ORI V0,V0,0001 SW V0,00E8 (V1) LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BNE V1,V0,807815E8 ADDU A1,A2,R0 ANDI S1,A1,00FF ADDU S3,A0,R0 LBU V0,0000 (S0) BNEL V0,S1,807815D8 ADDIU S0,S0,0001 SW S0,0000 (A0) JAL 80781440 ADDIU S2,S2,0001 ADDU A0,V0,R0 BEQ A0,R0,80781620 ADDIU S0,S0,0001 BNE S0,S3,807815B4 ADDU V0,S2,R0 J 80781624 NOP SLL V0,A2,0x10 SRA S0,V0,0x10 LUI S3,8040 LH V0,0000 (S1) BNEL V0,S0,80781618 ADDIU S1,S1,0002 SW S1,0000 (A0) JAL 80781440 ADDIU S2,S2,0001 ADDU A0,V0,R0 BEQ A0,R0,80781620 ADDIU S1,S1,0002 BNE S1,S3,807815F4 NOP ADDU V0,S2,R0 LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80781640 ADDIU SP,SP,FFD0 SW S3,001C (SP) ADDU S3,A1,R0 SW S2,0018 (SP) LUI S2,8040 SW S1,0014 (SP) ADDU S1,S2,R0 SW S4,0020 (SP) ADDU S4,R0,R0 ADDU A1,A0,R0 LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 SW RA,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) BNE V1,V0,807816E0 SW S0,0010 (SP) BEQ S3,R0,80781740 ANDI S5,A1,00FF LW S0,0000 (S2) JAL 80781440 ADDU A0,S2,R0 ADDU S2,V0,R0 BEQ S2,R0,80781744 ADDU V0,S4,R0 LBU V0,0000 (S0) BNEL V0,S5,807816D0 ADDIU S3,S3,FFFF SW S0,0000 (S1) ADDIU S4,S4,0001 JAL 80781440 ADDU A0,S1,R0 ADDU S1,V0,R0 BEQ S1,R0,80781740 ADDIU S3,S3,FFFF BNE S3,R0,80781690 ADDU V0,S4,R0 J 80781744 NOP BEQ S3,R0,80781740 SLL V0,A0,0x10 SRA S6,V0,0x10 LUI S5,00FF ORI S5,S5,FFFF LW S0,0000 (S2) JAL 80781440 ADDU A0,S2,R0 ADDU S2,V0,R0 BEQ S2,R0,80781744 ADDU V0,S4,R0 LH V0,0000 (S0) BNEL V0,S6,80781738 ADDIU S3,S3,FFFF AND V0,S0,S5 SW V0,0000 (S1) ADDIU S4,S4,0001 JAL 80781440 ADDU A0,S1,R0 ADDU S1,V0,R0 BEQ S1,R0,80781740 ADDIU S3,S3,FFFF BNE S3,R0,807816F4 NOP ADDU V0,S4,R0 LW RA,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 8078176C unconditional return JR RA NOP 80781774 likely data ;LW V0,8890 (S2) ;ADDIU A2,R0,0140 ;SW RA,0030 (SP) 80781780 unconditional return JR RA NOP 80781788 unconditional return JR RA NOP 80781790 unconditional return JR RA NOP 80781798 unconditional return JR RA NOP 807817A0 unconditional return JR RA NOP 807817A8 ADDIU SP,SP,FFD8 LUI V1,1A6D ORI V1,V1,01A7 ADDIU V0,R0,008C SW V0,0010 (SP) ADDIU V0,R0,002A MULT A0,V1 SRA A0,A0,0x1F ADDIU A1,R0,00C9 ADDIU A3,R0,0009 SW RA,0020 (SP) SW V0,0014 (SP) SW R0,0018 (SP) MFHI T0 SRA A2,T0,0x7 SUBU A2,A2,A0 ADDIU A0,R0,0035 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} ADDIU A2,A2,0004 LW RA,0020 (SP) JR RA ADDIU SP,SP,0028 80781800 V0=A0 JR RA ADDU V0,A0,R0 80781808 unconditional return JR RA NOP 80781810 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW V0,00EC (V1) BEQL V0,R0,80781834 ADDIU V0,R0,0015 ADDIU V0,R0,0016 SW V0,0078 (V1) J 8078183C ADDIU V0,R0,0009 SW V0,0078 (V1) ADDIU V0,R0,0008 SW V0,0084 (V1) JR RA ADDU V0,R0,R0 80781848 unconditional return JR RA NOP 80781850 unconditional return JR RA NOP 80781858 V0=0 JR RA ADDU V0,R0,R0 80781860 V0=0 JR RA ADDU V0,R0,R0 80781868 V0=0 JR RA ADDU V0,R0,R0 80781870 ADDIU SP,SP,FFD0 ADDU A1,A0,R0 LUI V1,807A LW V0,9E10 (V1) ;V0=80799E10: p->codegen runtime data ADDU A0,R0,R0 SW RA,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) LW V0,00EC (V0) BEQ V0,R0,80781908 ADDU S0,A0,R0 BLTZ V0,80781908 ADDU S2,A0,R0 LUI S5,8000 ADDIU S4,R0,0064 ADDU S3,V1,R0 ADDU S1,A1,R0 JAL 80783DF4 ADDIU S0,S0,0001 ADDU A0,V0,R0 ADDU V0,A0,S5 SW V0,0000 (S1) ADDIU S1,S1,0004 BNE S0,S4,807818F0 ADDIU A0,A0,0001 LW V0,9E10 (S3) ;V0=80799E10: p->codegen runtime data J 80781918 SW S0,00BC (V0) LW V0,9E10 (S3) ;V0=80799E10: p->codegen runtime data LW V0,00EC (V0) ADDIU S2,S2,0001 SLT V0,V0,S2 BEQ V0,R0,807818C4 NOP LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data ADDIU V0,S0,FFFF SW V0,00BC (V1) LW RA,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 8078193C unconditional return JR RA NOP 80781944 ADDIU SP,SP,FFE8 SW S0,0010 (SP) LUI S0,807A LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data SW RA,0014 (SP) LW A0,0048 (V0) JAL 8078193C NOP LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data SW V0,0130 (V1) LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 8078197C SW S3,0018 (SP) ADDIU SP,SP,FFC8 SW S5,002C (SP) LW S5,0048 (SP) SW S0,0018 (SP) LW S0,004C (SP) SW S1,001C (SP) ADDU S1,A0,R0 SW S2,0020 (SP) ADDU S2,A1,R0 SW S3,0024 (SP) ADDU S3,A2,R0 SW S4,0028 (SP) SW RA,0030 (SP) JAL 80791FE0 ADDU S4,A3,R0 ADDU A0,S1,R0 ADDU A1,S2,R0 ADDU A2,S3,R0 ADDU A3,S4,R0 SW S5,0010 (SP) JAL 80781A1C SW S0,0014 (SP) LW V0,0000 (S0) BNE V0,R0,807819F8 ADDU V0,R0,R0 JAL 80793BE8 ADDU A0,S5,R0 ADDU A0,S5,R0 JAL 80781DE0 ADDU A1,V0,R0 LW RA,0030 (SP) LW S5,002C (SP) LW S4,0028 (SP) LW S3,0024 (SP) LW S2,0020 (SP) LW S1,001C (SP) LW S0,0018 (SP) JR RA ADDIU SP,SP,0038 80781A1C ADDIU SP,SP,FFC0 SW S4,0028 (SP) LW S4,0050 (SP) SW S7,0034 (SP) ADDU S7,A2,R0 SW S6,0030 (SP) ADDU S6,A3,R0 SW S5,002C (SP) ADDU S5,R0,R0 SW S8,0038 (SP) ADDU S8,S5,R0 SW RA,003C (SP) SW S3,0024 (SP) SW S2,0020 (SP) SW S1,001C (SP) SW S0,0018 (SP) SW A0,0040 (SP) SW A1,0044 (SP) JAL 80793BE8 ADDU A0,S4,R0 ADDU S1,V0,R0 ADDU A1,S7,R0 LW T0,0044 (SP) LW A3,0040 (SP) ADDIU A2,S6,0001 SW S8,0010 (SP) JAL 80793D04 ADDIU A0,T0,FFFC ADDU A0,S4,R0 ADDU A1,S1,R0 JAL 80781D1C ADDU A2,S7,R0 JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP ADDU S2,V0,R0 BEQ S2,R0,80781CD0 NOP JAL 80793BE8 ADDU A0,S4,R0 ADDU S0,V0,R0 LUI V0,0200 ORI V0,V0,0004 AND V0,S2,V0 BEQ V0,R0,80781AEC LUI V0,0100 BLEZ S1,80781AF0 ORI V0,V0,0008 ADDIU S1,S1,FFFF LUI A0,0200 JAL 80792DFC ;wait until buttons/stick state A0 released ORI A0,A0,0004 LUI V0,0100 ORI V0,V0,0008 AND V0,S2,V0 BEQ V0,R0,80781B30 SLT V0,S1,S0 BNEL V0,R0,80781B24 ADDIU S1,S1,0001 SLT V0,S0,S6 BEQ V0,R0,80781B24 ADDU V0,S4,S1 LBU V0,0000 (V0) BEQL V0,R0,80781B28 LUI A0,0100 ADDIU S0,S0,0001 ADDIU S1,S1,0001 LUI A0,0100 JAL 80792DFC ;wait until buttons/stick state A0 released ORI A0,A0,0008 LUI V0,0020 AND V0,S2,V0 BEQ V0,R0,80781B68 LUI V0,0010 ADDIU S0,R0,0027 ADDU V0,S4,S0 ADDIU S0,S0,FFFF BGEZ S0,80781B44 SB R0,0000 (V0) JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,0020 ADDU S0,R0,R0 ADDU S1,S0,R0 LUI V0,0010 AND V0,S2,V0 BEQ V0,R0,80781BAC ADDU V0,S0,S4 SB R0,FFFF (V0) JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,0010 JAL 80793BE8 ADDU A0,S4,R0 SLT V0,V0,S0 BEQ V0,R0,80781BA4 ADDIU S1,S0,FFFF JAL 80793BE8 ADDU A0,S4,R0 ADDU S0,V0,R0 ADDIU S1,S0,FFFF BLTZL S1,80781BAC ADDU S1,R0,R0 LUI V0,0400 ORI V0,V0,0001 AND V0,S2,V0 BEQ V0,R0,80781C14 ADDU S3,S4,S1 LBU V0,0000 (S3) ADDIU S0,V0,FFFF ANDI V1,S0,00FF ADDIU V0,R0,00FF BEQL V1,V0,80781BD8 ADDIU S0,R0,005A ANDI V1,S0,00FF ADDIU V0,R0,0040 BEQL V1,V0,80781BE8 ADDIU S0,R0,0039 ANDI V1,S0,00FF ADDIU V0,R0,002F BEQL V1,V0,80781BF8 ADDIU S0,R0,0020 ANDI V1,S0,00FF ADDIU V0,R0,001F BEQL V1,V0,80781C08 ADDIU S0,R0,005A JAL 807930F0 ;wait for A0 vsyncs ADDIU A0,R0,0005 SB S0,0000 (S3) LUI V0,0800 ORI V0,V0,0002 AND V0,S2,V0 BEQ V0,R0,80781C7C ADDU S3,S4,S1 LBU V0,0000 (S3) ADDIU S0,V0,0001 ANDI V1,S0,00FF ADDIU V0,R0,0001 BEQL V1,V0,80781C40 ADDIU S0,R0,0020 ANDI V1,S0,00FF ADDIU V0,R0,0021 BEQL V1,V0,80781C50 ADDIU S0,R0,0030 ANDI V1,S0,00FF ADDIU V0,R0,003A BEQL V1,V0,80781C60 ADDIU S0,R0,0041 ANDI V1,S0,00FF ADDIU V0,R0,005B BEQL V1,V0,80781C70 ADDIU S0,R0,0020 JAL 807930F0 ;wait for A0 vsyncs ADDIU A0,R0,0005 SB S0,0000 (S3) ADDU V0,S4,S6 SB R0,0000 (V0) LUI V0,4000 AND V0,S2,V0 BEQ V0,R0,80781CA0 NOP JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,4000 ADDIU S5,R0,0002 BGEZ S2,80781CB8 LUI V0,1000 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 ADDIU S5,R0,0001 LUI V0,1000 AND V0,S2,V0 BEQ V0,R0,80781CD0 NOP JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,1000 ADDIU S5,R0,0003 JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP BEQ S5,R0,80781A74 ADDU A1,S7,R0 LW V0,0054 (SP) ADDIU V1,S5,FFFF SW V1,0000 (V0) LW RA,003C (SP) LW S8,0038 (SP) LW S7,0034 (SP) LW S6,0030 (SP) LW S5,002C (SP) LW S4,0028 (SP) LW S3,0024 (SP) LW S2,0020 (SP) LW S1,001C (SP) LW S0,0018 (SP) JR RA ADDIU SP,SP,0040 80781D1C ADDIU SP,SP,FFC8 SW S3,002C (SP) ADDU S3,A0,R0 SW S0,0020 (SP) ADDU S0,A1,R0 SW S2,0028 (SP) ADDU S2,A2,R0 SW RA,0030 (SP) JAL 80793BE8 SW S1,0024 (SP) ADDIU S2,S2,000D ADDIU V0,V0,0001 SLL V1,V0,0x2 ADDIU S1,R0,00A0 SUBU S1,S1,V1 ADDU A0,S1,R0 ADDU A1,S2,R0 SLL A2,V0,0x3 ADDIU A3,R0,0008 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) SLL S0,S0,0x3 ADDU A0,S1,S0 ADDU A1,S2,R0 ADDIU A2,R0,0008 ADDU A3,A2,R0 ADDIU V0,R0,0014 SW V0,0010 (SP) SW V0,0014 (SP) ADDIU V0,R0,008C JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW V0,0018 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP ADDU A0,S1,R0 ADDU A1,S2,R0 ADDU A2,S3,R0 LUI A3,FFFE JAL 80792BF8 ORI A3,A3,FFFE LW RA,0030 (SP) LW S3,002C (SP) LW S2,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0038 80781DE0 ADDIU SP,SP,FFC8 SW S3,002C (SP) ADDU S3,A0,R0 SW S1,0024 (SP) ADDU S1,A1,R0 ADDU A0,R0,R0 SW S2,0028 (SP) LUI S2,807A ADDIU A1,R0,00C8 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDIU A2,R0,0140 SW RA,0030 (SP) SW S0,0020 (SP) LW V0,00A8 (V0) ADDIU A3,R0,0028 SW R0,0010 (SP) SW R0,0014 (SP) SW R0,0018 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} ADDIU S0,V0,0001 JAL 80791FE0 NOP JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP ADDIU A0,R0,00C8 LUI A2,FFFE LUI V0,807A LW A1,9FDC (V0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP BLEZ S1,80781EB0 ADDU V0,R0,R0 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00AC (V1) SUBU V0,V0,S1 SLT V0,V0,S0 BEQ V0,R0,80781E88 ADDU A0,S0,R0 LW S0,00B0 (V1) ADDU A0,S0,R0 ADDU A1,S3,R0 JAL 80781ECC ADDU A2,S1,R0 BNE V0,R0,80781EB0 ADDU V0,S0,R0 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00A8 (V1) ADDIU S0,S0,0001 BNE S0,V0,80781E6C ADDU V0,R0,R0 LW RA,0030 (SP) LW S3,002C (SP) LW S2,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0038 80781ECC BLEZ A2,80781F28 ADDU T0,A0,R0 LBU V1,0000 (A0) ADDIU A0,A0,0001 LBU A3,0000 (A1) ADDIU V0,V1,FFBF SLTIU V0,V0,001A BEQ V0,R0,80781EF4 ADDIU A1,A1,0001 ORI V1,V1,0020 ADDIU V0,A3,FFBF ANDI V0,V0,00FF SLTIU V0,V0,001A BNEL V0,R0,80781F08 ORI A3,A3,0020 ANDI V1,V1,00FF ANDI V0,A3,00FF BEQ V1,V0,80781F20 ADDIU A2,A2,FFFF JR RA ADDU V0,R0,R0 BGTZ A2,80781ED4 NOP JR RA ADDU V0,T0,R0 80781F30 ADDIU SP,SP,FFE0 SW S2,0018 (SP) ADDU S2,A0,R0 SW S1,0014 (SP) ADDU S1,A1,R0 SW S0,0010 (SP) ADDU S0,R0,R0 SW RA,001C (SP) JAL 80793BE8 ADDU A0,S1,R0 SLT V0,S0,V0 BEQ V0,R0,80781F78 ADDU V0,S2,S0 ADDU V1,S1,S0 LBU V1,0000 (V1) ADDIU S0,S0,0001 J 80781F50 SB V1,0000 (V0) SB R0,0000 (V0) LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80781F94 ADDIU SP,SP,FF70 SW S5,0084 (SP) LUI S5,807A LW V0,9E10 (S5) ;V0=80799E10: p->codegen runtime data SW S2,0078 (SP) ADDU S2,A0,R0 SW S3,007C (SP) ADDU S3,A1,R0 SW RA,008C (SP) SW S6,0088 (SP) SW S4,0080 (SP) SW S1,0074 (SP) SW S0,0070 (SP) LW V0,0160 (V0) ADDIU S0,S2,FFFE JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb SLT S4,R0,V0 LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDU S1,R0,R0 LW A0,0080 (V1) BNE A0,R0,807820CC ADDIU S6,R0,0003 ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A ADDIU S1,S4,0005 ADDU A3,S1,R0 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) LUI V0,8079 LW T0,5980 (V0) LUI V0,807A ADDIU T1,V0,9E20 LW V0,9E20 (V0) LW V1,0004 (T1) LW A0,003C (T1) LW A1,000C (T1) LW A2,0010 (T1) ADDIU A3,S4,0006 SW S2,0010 (SP) SW S3,0014 (SP) SW V0,0018 (SP) SW V1,001C (SP) SW A0,0020 (SP) SW A1,0024 (SP) BGEZ T0,8078205C SW A2,0028 (SP) ADDIU T0,T0,000F ADDIU A0,R0,0024 ADDIU A1,R0,0028 SRA V0,T0,0x4 ADDIU V0,V0,0071 SLL V0,V0,0x2 ADDU V0,V0,T1 LW V0,0000 (V0) LW V1,004C (T1) ADDIU A2,R0,001A SW V0,002C (SP) JAL 80793A34 SW V1,0030 (SP) LW V0,9E10 (S5) ;V0=80799E10: p->codegen runtime data SW S1,0084 (V0) SLTI V0,S2,0002 BEQ V0,R0,807820A8 SLL V0,S2,0x1 J 807820B4 ADDIU S1,V0,002F SLL V0,S0,0x1 ADDU V0,V0,S0 ADDIU S1,V0,0037 ADDIU V0,R0,0004 BNEL S2,V0,80782620 ADDU A0,R0,R0 ADDIU S1,R0,0073 J 8078261C ADDIU S6,R0,0001 ADDIU S4,R0,0002 BEQ A0,S4,807820E4 NOP LW V0,0108 (V1) BEQ V0,R0,80782208 ADDIU V0,R0,000A LW V0,0078 (V1) BEQ V0,R0,80782100 ADDIU A0,R0,0024 LW V0,00EC (V1) BNE V0,R0,8078217C ADDIU A1,R0,0028 ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A ADDIU A3,R0,0003 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A LUI V1,807A ADDIU V0,V1,9E20 LW V1,9E20 (V1) LW T0,0004 (V0) LW T1,0008 (V0) LW V0,0030 (V0) ADDIU A3,R0,0004 SW S2,0010 (SP) SW S3,0014 (SP) SW V1,0018 (SP) SW T0,001C (SP) SW T1,0020 (SP) JAL 80793A34 SW V0,0024 (SP) LW V0,9E10 (S5) ;V0=80799E10: p->codegen runtime data SW S6,0084 (V0) SLTI V0,S2,0002 BNE V0,R0,807825F4 SLL V0,S2,0x1 J 8078261C ADDIU S1,R0,003D ADDIU A2,R0,001A ADDIU A3,R0,0004 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A LUI V1,807A ADDIU V0,V1,9E20 LW V1,9E20 (V1) LW T0,0004 (V0) LW T1,0008 (V0) LW T2,0030 (V0) LW V0,004C (V0) ADDIU A3,R0,0005 SW S2,0010 (SP) SW S3,0014 (SP) SW V1,0018 (SP) SW T0,001C (SP) SW T1,0020 (SP) SW T2,0024 (SP) JAL 80793A34 SW V0,0028 (SP) LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0004 SW V0,0084 (V1) SLTI V0,S2,0002 BNE V0,R0,807825F4 SLL V0,S2,0x1 SLL V0,S0,0x1 ADDU V0,V0,S0 J 8078261C ADDIU S1,V0,003D BNE A0,V0,80782388 ADDIU A1,R0,0014 LW A1,0078 (V1) BEQ A1,A0,8078222C ADDIU A0,R0,0024 LW V0,00EC (V1) BNE V0,R0,807822DC ADDIU V0,R0,000B ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A ADDIU A3,R0,0004 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) LUI V0,8079 LW A3,5980 (V0) LUI V0,807A ADDIU T0,V0,9E20 LW V0,000C (T0) LW V1,0004 (T0) LW A0,0008 (T0) LW A1,0030 (T0) SW S2,0010 (SP) SW S3,0014 (SP) SW V0,0018 (SP) SW V1,001C (SP) SW A0,0020 (SP) BGEZ A3,80782288 SW A1,0024 (SP) ADDIU A3,A3,000F ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A SRA V0,A3,0x4 ADDIU V0,V0,0076 SLL V0,V0,0x2 ADDU V0,V0,T0 LW V0,0000 (V0) ADDIU A3,R0,0005 JAL 80793A34 SW V0,0028 (SP) LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0004 SW V0,0084 (V1) SLTI V0,S2,0002 BNE V0,R0,807825F4 SLL V0,S2,0x1 BNE S2,S4,8078261C ADDIU S1,R0,0043 J 8078261C ADDIU S1,R0,003D BNE A1,V0,80782620 ADDU A0,R0,R0 ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A ADDIU A3,R0,0005 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A LUI V0,807A ADDIU V0,V0,9E20 LW V1,000C (V0) LW T0,0004 (V0) LW T1,0008 (V0) LW T2,0030 (V0) LW T3,0014 (V0) LW V0,004C (V0) ADDIU A3,R0,0006 SW S2,0010 (SP) SW S3,0014 (SP) SW V1,0018 (SP) SW T0,001C (SP) SW T1,0020 (SP) SW T2,0024 (SP) SW T3,0028 (SP) JAL 80793A34 SW V0,002C (SP) LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0005 SW V0,0084 (V1) SLTI V0,S2,0002 BNEL V0,R0,807825F4 SLL V0,S2,0x1 BEQ S2,S4,8078261C ADDIU S1,R0,003D BNE S2,S6,8078261C ADDIU S1,R0,0040 J 8078261C ADDIU S1,R0,0043 BEQ A0,A1,8078239C NOP LW V0,00EC (V1) BNE V0,R0,80782620 ADDU A0,R0,R0 LW V1,0078 (V1) BNE V1,A1,80782490 ADDIU V0,R0,0015 LUI S0,807A ADDIU S0,S0,9E20 LW A1,005C (S0) JAL 80781F30 ADDIU A0,SP,0040 ADDIU A0,SP,0040 LUI A1,8079 JAL 80794814 ADDIU A1,A1,4DC0 LW V0,9E10 (S5) ;V0=80799E10: p->codegen runtime data ADDIU A0,SP,0040 LBU V0,004B (V0) ADDIU A1,SP,0068 SB R0,0069 (SP) ADDIU V0,V0,0031 JAL 80794814 SB V0,0068 (SP) ADDIU A0,SP,0040 LUI A1,8079 JAL 80794814 ADDIU A1,A1,4DC8 ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A ADDIU A3,R0,0004 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) ADDIU A0,R0,0024 ADDIU A1,R0,0028 ADDIU A2,R0,001A LW V0,0010 (S0) LW V1,0004 (S0) LW T0,0008 (S0) LW T1,0030 (S0) LW T2,002C (S0) ADDIU A3,R0,0005 SW S2,0010 (SP) SW S3,0014 (SP) SW V0,0018 (SP) SW V1,001C (SP) SW T0,0020 (SP) SW T1,0024 (SP) JAL 80793A34 SW T2,0028 (SP) LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0004 SW V0,0084 (V1) SLTI V0,S2,0002 BNEL V0,R0,807825F4 SLL V0,S2,0x1 BEQ S2,S4,8078261C ADDIU S1,R0,003D BNE S2,S6,8078261C ADDIU S1,R0,0049 J 8078261C ADDIU S1,R0,0046 BNE V1,V0,80782544 ADDIU V0,R0,0016 ADDIU A0,R0,0020 ADDIU A1,R0,0010 ADDIU A2,R0,001B ADDIU A3,R0,0007 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) ADDIU A0,R0,0020 ADDIU A1,R0,0010 ADDIU A2,R0,001B LUI V0,807A ADDIU V0,V0,9E20 LW V1,0010 (V0) LW T0,0004 (V0) LW T1,0008 (V0) LW T2,0030 (V0) LW T3,001C (V0) LW T4,0020 (V0) LW T5,0024 (V0) LW V0,0028 (V0) ADDIU A3,R0,0008 SW S2,0010 (SP) SW S3,0014 (SP) SW V1,0018 (SP) SW T0,001C (SP) SW T1,0020 (SP) SW T2,0024 (SP) SW T3,0028 (SP) SW T4,002C (SP) SW T5,0030 (SP) JAL 80793A34 SW V0,0034 (SP) LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0007 SW V0,0084 (V1) SLTI V0,S2,0002 BNE V0,R0,807825F0 ADDIU S0,S2,FFFD BEQ S2,S4,807822D4 SLL V0,S0,0x1 J 80782618 ADDU V0,V0,S0 BNE V1,V0,80782620 ADDU A0,R0,R0 ADDIU A0,R0,0024 ADDIU A1,R0,0010 ADDIU A2,R0,001A ADDIU A3,R0,0008 SW R0,0010 (SP) SW S2,0014 (SP) JAL 8078F11C SW S3,0018 (SP) ADDIU A0,R0,0024 ADDIU A1,R0,0010 ADDIU A2,R0,001A LUI V0,807A ADDIU V0,V0,9E20 LW V1,0010 (V0) LW T0,0004 (V0) LW T1,0008 (V0) LW T2,0030 (V0) LW T3,001C (V0) LW T4,0020 (V0) LW T5,0024 (V0) LW T6,0028 (V0) LW V0,004C (V0) ADDIU A3,R0,0009 SW S2,0010 (SP) SW S3,0014 (SP) SW V1,0018 (SP) SW T0,001C (SP) SW T1,0020 (SP) SW T2,0024 (SP) SW T3,0028 (SP) SW T4,002C (SP) SW T5,0030 (SP) SW T6,0034 (SP) JAL 80793A34 SW V0,0038 (SP) LW V1,9E10 (S5) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0008 SW V0,0084 (V1) SLTI V0,S2,0002 BEQ V0,R0,807825FC ADDIU S0,S2,FFFD SLL V0,S2,0x1 J 8078261C ADDIU S1,V0,002F BEQ S2,S4,807822D4 ADDIU V0,R0,0007 BNE S2,V0,80782614 SLL V0,S0,0x1 J 8078261C ADDIU S1,R0,0040 ADDU V0,V0,S0 ADDIU S1,V0,004C ADDU A0,R0,R0 ADDIU A1,R0,009C ADDIU A2,R0,0140 ADDIU A3,R0,0020 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 8078306C ADDIU A0,R0,00BC LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data LW V0,0108 (V0) BEQ V0,R0,80782698 ADDIU A0,R0,00D4 LUI A2,FFFE LUI S0,807A ADDIU S0,S0,9E20 LW A1,00B0 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00DC LUI A2,FFFE LW A1,00B4 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00E4 LUI A2,FFFE LW A1,00B8 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,009C LUI V0,807A ADDIU S0,V0,9E20 SLL V0,S1,0x2 ADDU V0,V0,S0 LW A1,0000 (V0) LUI A2,FFFE JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE SLTI V0,S6,0002 BNE V0,R0,80782704 ADDIU A0,R0,00A4 LUI A2,FFFE ADDIU V0,S1,0001 SLL V0,V0,0x2 ADDU V0,V0,S0 LW A1,0000 (V0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00AC LUI A2,FFFE ADDIU V0,S1,0002 SLL V0,V0,0x2 ADDU V0,V0,S0 LW A1,0000 (V0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE LW RA,008C (SP) LW S6,0088 (SP) LW S5,0084 (SP) LW S4,0080 (SP) LW S3,007C (SP) LW S2,0078 (SP) LW S1,0074 (SP) LW S0,0070 (SP) JR RA ADDIU SP,SP,0090 8078272C ADDIU SP,SP,FFE8 SW S0,0010 (SP) LUI S0,807A ADDIU V1,R0,0004 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A0,R0,0001 SW RA,0014 (SP) SW R0,0078 (V0) SW R0,00E8 (V0) SW R0,00EC (V0) SW R0,0080 (V0) JAL 8078277C SW V1,0084 (V0) LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data SW R0,0104 (V0) SW R0,0108 (V0) LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 8078277C accepts: A0=mode (0-;1-) ADDIU SP,SP,FFE8 BEQ A0,R0,807827E4 ;branch if not mode 1: SW RA,0010 (SP) ADDU T0,R0,R0 ADDU T1,R0,R0 ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 ADDIU A3,R0,00F0 ;A3=F0 LUI V1,8079 ADDIU V0,R0,FFFF SW V0,5974 (V1) ;-1 ->80795974: LUI V1,8079 ADDIU V0,R0,0001 LUI AT,807A SW T0,B228 (AT) ;0->8079B228: black LUI AT,807A SW T1,B22C (AT) ;0->8079B22C: black JAL 80784940 ;fill region {A0,A1} to {A2,A3} with colour SW V0,5970 (V1) ;1->80795970: LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data ADDU A1,R0,R0 ;A1=0 LW A0,0070 (V0) ;A0=codegen.runtime+70: J 80782830 ADDU A2,A1,R0 ;A2=0 //807827E4: mode 0: ADDU T0,R0,R0 ADDU T1,R0,R0 ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 ADDIU A3,R0,00F0 ;A3=140 LUI V1,8079 ADDIU V0,R0,0001 LUI AT,807A SW T0,B228 (AT) ;0->8079B228: black LUI AT,807A SW T1,B22C (AT) ;0->8079B22C: black JAL 80784940 ;fill region {A0,A1} to {A2,A3} with colour SW V0,5970 (V1) ;1->80795970: LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data ADDU A1,R0,R0 ;A1=0 LW A0,0070 (V0) ;A0=codegen.runtime+70: ADDIU A2,R0,0001 ;A2=1 //80782830: JAL 80781F94 NOP JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LUI V0,807A LUI V1,8079 LW A0,9E10 (V0) ;A0=80799E10: p->codegen runtime data LW RA,0010 (SP) ADDIU V0,R0,0001 SW V0,5970 (V1) ;1->80795970: LW V1,0070 (A0) ;V1=codegen.runtime+70: LUI V0,8079 SW V1,5974 (V0) ;V1->80795974: JR RA ADDIU SP,SP,0018 8078286C redirect to 8078277C: A0=0 ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 8078277C ADDU A0,R0,R0 ;A0=0 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80782888 ADDIU SP,SP,FFE8 LUI V1,8079 ADDIU V0,R0,0001 SW V0,5970 (V1) ;1->80795970: LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data ADDIU A1,R0,0001 ;A1=1 SW RA,0010 (SP) LW A0,0070 (V0) ;A0=codegen.runtime+70: JAL 80781F94 ADDU A2,R0,R0 ;A2=0 JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 807828C8 ADDIU SP,SP,FFB0 SW S1,002C (SP) ADDU S1,R0,R0 SW S4,0038 (SP) ADDIU S4,R0,0001 SW RA,004C (SP) SW S8,0048 (SP) SW S7,0044 (SP) SW S6,0040 (SP) SW S5,003C (SP) SW S3,0034 (SP) SW S2,0030 (SP) BEQ A0,R0,80782910 SW S0,0028 (SP) LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data JAL 8078272C SW R0,0070 (V0) JAL 8078277C ADDIU A0,R0,0001 LUI S0,807A ADDIU S2,R0,0001 ADDIU S6,R0,0014 LUI S5,8079 ADDIU S7,R0,0002 LUI V0,807A ADDIU S8,V0,9E20 JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP LUI V1,0800 ORI V1,V1,0002 ADDU S3,V0,R0 AND V1,S3,V1 BEQ V1,R0,80782970 LUI V0,0400 LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data LW V0,0070 (V1) BLEZ V0,8078296C ADDIU V0,V0,FFFF SW V0,0070 (V1) ADDIU S4,R0,0001 LUI V0,0400 ORI V0,V0,0001 AND V0,S3,V0 BEQ V0,R0,807829A8 LUI V0,1000 LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data LW V0,0084 (V1) LW A0,0070 (V1) ADDIU V0,V0,FFFF SLT V0,A0,V0 BEQ V0,R0,807829A4 ADDIU V0,A0,0001 SW V0,0070 (V1) ADDIU S4,R0,0001 LUI V0,1000 AND V0,S3,V0 BEQ V0,R0,807829BC NOP J 8078303C ADDIU V0,R0,0001 BGEZ S3,80782FEC ADDIU A1,R0,0001 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LW A0,0070 (V0) JAL 80781F94 ADDU A2,R0,R0 LUI A0,8000 LUI A1,8078 JAL 80792FB0 ADDIU A1,A1,2888 LW A0,9E10 (S0) ;A0=80799E10: p->codegen runtime data LW A1,0080 (A0) BNE A1,R0,80782B18 NOP LW V1,0070 (A0) SLTIU V0,V1,0005 BEQ V0,R0,80782AF0 LUI V0,8079 ADDIU V0,V0,4DD0 SLL V1,V1,0x2 ADDU V1,V1,V0 LW V0,0000 (V1) JR V0 NOP ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) J 8078303C ADDU V0,R0,R0 ADDIU A0,R0,0001 ADDIU A1,R0,FFFF LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,000A SW S2,010C (V1) SW V0,0078 (V1) SW V0,0080 (V1) JAL 80784504 SW R0,0070 (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 LUI V1,8079 ADDIU V0,R0,FFFF SW V0,5974 (V1) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) J 80782FC4 ADDU A0,R0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW R0,010C (V0) SW S6,0078 (V0) SW S6,0080 (V0) J 80782FB0 SW R0,0070 (V0) LW V1,5980 (S5) ADDIU V0,R0,0020 SLL V1,V1,0x1 BNE V1,V0,80782AE0 SW V1,5980 (S5) ADDIU V0,R0,0008 SW V0,5980 (S5) JAL 8078277C ADDU A0,R0,R0 J 80782FEC NOP JAL 80791084 ADDIU A0,R0,FFFF ADDU S1,V0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 J 80782FB0 SW R0,0070 (V0) BNE A1,S7,80782BA0 ADDIU V0,A1,FFF6 LW V1,0070 (A0) BEQ V1,S2,80782A3C SW S2,0104 (A0) SLTI V0,V1,0002 BEQ V0,R0,80782B48 NOP BEQ V1,R0,80782B60 ADDIU V0,R0,0001 J 80782FEC NOP BEQ V1,A1,80782B70 ADDIU V0,R0,0003 BEQ V1,V0,80782B80 NOP J 80782FEC NOP ADDIU V1,R0,0004 SW V1,0084 (A0) J 8078303C SW R0,0070 (A0) JAL 8078272C NOP J 80782E40 NOP JAL 80791084 ADDU A0,R0,R0 ADDU S1,V0,R0 JAL 8078277C ADDIU A0,R0,0001 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data J 80782FEC SW R0,0070 (V0) SLTIU V0,V0,000A BEQ V0,R0,80782DCC NOP LW V1,0070 (A0) SLTIU V0,V1,0005 BEQ V0,R0,80782FEC LUI V0,8079 ADDIU V0,V0,4DE8 SLL V1,V1,0x2 ADDU V1,V1,V0 LW V0,0000 (V1) JR V0 NOP JAL 8078272C NOP J 80782E40 NOP LW A0,9E10 (S0) ;A0=80799E10: p->codegen runtime data LW V1,0078 (A0) ADDIU V0,R0,000B BNE V1,V0,80782C20 NOP LW V0,00EC (A0) BEQ V0,S6,80782C20 NOP LW V0,0108 (A0) BEQ V0,R0,80782C20 NOP JAL 80791084 ADDU A0,R0,R0 J 80782E40 ADDU S1,V0,R0 LW T0,9E10 (S0) ;T0=80799E10: p->codegen runtime data LW V0,00E8 (T0) ANDI V0,V0,0001 BNE V0,R0,80782CC4 ADDIU A1,R0,0064 ADDIU A2,R0,008C LW A0,0014 (S8) LW V1,00F8 (T0) LW V0,5980 (S5) SLL A3,V1,0x1 ADDU A3,A3,V1 SLL A3,A3,0x1 ADDIU A3,A3,000A SW V0,0010 (SP) LW V1,00F0 (T0) ADDIU V0,SP,0020 SW R0,0018 (SP) SW V0,001C (SP) JAL 807942EC SW V1,0014 (SP) LW V1,0020 (SP) BNE V1,S2,80782CA4 ADDU A3,V0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) J 80782FC4 ADDU A0,R0,R0 BEQ V1,S7,80782DFC ADDIU A0,R0,0020 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDU A1,A3,R0 JAL 80784504 SW A1,00F0 (V0) J 80782D28 NOP ADDIU A2,R0,008C LW A0,0014 (S8) LW V1,00F8 (T0) LW V0,5980 (S5) SLL A3,V1,0x1 ADDU A3,A3,V1 SLL A3,A3,0x1 ADDIU A3,A3,000A SW V0,0010 (SP) LW V1,00F0 (T0) ADDIU V0,SP,0020 SW R0,0018 (SP) SW V0,001C (SP) JAL 807942EC SW V1,0014 (SP) LW V1,0020 (SP) BEQ V1,S2,80782FEC ADDU A3,V0,R0 BEQ V1,S7,80782DFC ADDU A0,A3,R0 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LW A1,00EC (V0) LW A2,00F4 (V0) JAL 80781640 SW A0,00F0 (V0) LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data SW V0,00EC (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S2,0104 (V0) SW S2,0108 (V0) SW R0,0070 (V0) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 8078277C ADDIU A0,R0,0001 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data LW V0,00EC (V1) BLEZ V0,80782DA0 ADDIU V0,R0,000B J 80782DA4 SW V0,0078 (V1) SW S7,0080 (V1) JAL 807930F0 ;wait for A0 vsyncs ADDIU A0,R0,000C JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 J 80782FEC NOP JAL 80791084 ADDU A0,R0,R0 J 80782E40 ADDU S1,V0,R0 BNE A1,S6,80782FEC NOP LW V1,0070 (A0) SLTIU V0,V1,0008 BEQ V0,R0,80782FEC LUI V0,8079 ADDIU V0,V0,4E00 SLL V1,V1,0x2 ADDU V1,V1,V0 LW V0,0000 (V1) JR V0 NOP J 80782FEC ADDIU S1,R0,0001 JAL 8078272C NOP J 80782E40 NOP LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data LW V0,0108 (V1) BEQ V0,R0,80782E50 NOP JAL 80791084 ADDIU A0,R0,0001 ADDU S1,V0,R0 JAL 807930F0 ;wait for A0 vsyncs ADDIU A0,R0,000C JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 JAL 8078277C ADDIU A0,R0,0001 J 80782FEC NOP LW V0,0078 (V1) BNE V0,S6,80782E9C ADDIU V0,V0,FFEB ADDIU A0,R0,0001 ADDU A1,R0,R0 JAL 80784504 SW R0,00F0 (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU V1,R0,0015 SW V1,0078 (V0) ADDIU V1,R0,0008 SW V1,0084 (V0) SW S2,0108 (V0) J 80782FB0 SW R0,0070 (V0) SLTIU V0,V0,0002 BEQ V0,R0,80782FEC ADDIU A0,R0,0010 JAL 80784504 ADDU A1,R0,R0 LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data JAL 80781810 SW V0,00EC (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S2,0104 (V0) SW S2,0108 (V0) J 80782FB0 SW R0,0070 (V0) ADDIU A0,R0,0008 JAL 80784504 ADDU A1,R0,R0 LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data JAL 80781810 SW V0,00EC (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S2,0104 (V0) SW S2,0108 (V0) J 80782FB0 SW R0,0070 (V0) ADDIU A0,R0,0004 JAL 80784504 ADDU A1,R0,R0 LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data JAL 80781810 SW V0,00EC (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S2,0104 (V0) SW S2,0108 (V0) J 80782FB0 SW R0,0070 (V0) ADDIU A0,R0,0002 JAL 80784504 ADDU A1,R0,R0 LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data JAL 80781810 SW V0,00EC (V1) ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S2,0104 (V0) SW S2,0108 (V0) J 80782FB0 SW R0,0070 (V0) JAL 80791084 ADDIU A0,R0,0001 ADDU S1,V0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,0001 JAL 8078277C NOP ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) BNE S1,R0,8078303C ADDU V0,S1,R0 JAL 8078277C ADDU A0,R0,R0 BNE S3,R0,8078300C NOP LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data SW S2,0074 (V0) BEQ S4,R0,80782934 ADDU A0,S3,R0 ;A0=S3: ADDIU A1,R0,0003 ;A1=3: execute 3 times LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LUI A3,8078 LW A2,0074 (V0) ;A2=codegen.runtime+74: if nonzero, inc.count by F JAL 80793008 ;execute function A3 A1 times ADDIU A3,A3,286C ;A3=8078286C: p->function LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data ADDU S4,R0,R0 ;S4=0 J 80782934 SW R0,0074 (V0) //8078303C: return LW RA,004C (SP) LW S8,0048 (SP) LW S7,0044 (SP) LW S6,0040 (SP) LW S5,003C (SP) LW S4,0038 (SP) LW S3,0034 (SP) LW S2,0030 (SP) LW S1,002C (SP) LW S0,0028 (SP) JR RA ADDIU SP,SP,0050 8078306C ADDIU SP,SP,FFB0 SW S1,0044 (SP) ADDU S1,A0,R0 SW RA,0048 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb SW S0,0040 (SP) LUI S0,807A LW A0,9E10 (S0) ;A0=80799E10: p->codegen runtime data LW V0,0104 (A0) BEQ V0,R0,80783148 NOP LW A0,00EC (A0) SLTI V0,A0,0002 BNE V0,R0,807830E4 NOP JAL 80792C44 ADDIU A1,SP,0010 ADDIU A0,SP,0010 LUI A1,8079 JAL 80794814 ADDIU A1,A1,4E20 LUI V0,807A LW A1,9EC4 (V0) JAL 80794814 ADDIU A0,SP,0010 ADDU A0,S1,R0 ADDIU A1,SP,0010 LUI A2,FFFE JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LW V1,00EC (V0) ADDIU V0,R0,0001 BNE V1,V0,8078310C ADDU A0,S1,R0 LUI V0,807A LW A1,9EC8 (V0) LUI A2,FFFE JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LW V0,00EC (V0) BNE V0,R0,80783148 ADDIU A0,R0,00BC LUI A2,FFFE LUI S0,807A ADDIU S0,S0,9E20 LW A1,0090 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00C4 LUI A2,FFFE LW A1,00A0 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE LW RA,0048 (SP) LW S1,0044 (SP) LW S0,0040 (SP) JR RA ADDIU SP,SP,0050 8078315C ADDIU SP,SP,FFC8 SW S0,0010 (SP) LUI S0,807A ADDIU S0,S0,A000 SW RA,0034 (SP) SW S8,0030 (SP) SW S7,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) LW S1,0004 (S0) LW S5,0030 (S0) LW S4,0034 (S0) LW S3,0008 (S0) JAL 80793648 ;restore original game VI settings ADDU S2,R0,R0 LUI S6,803F ORI S6,S6,FFFF LUI S8,8079 LUI S7,8079 JAL 80785460 ;wait until video refresh NOP JAL 80785EB8 ;V0=controller 1 buttons/stick state NOP ADDU S0,V0,R0 SLTI V0,S2,0008 BNEL V0,R0,807831D8 ADDIU S2,S2,0001 BEQL S0,R0,807831E0 ADDU S2,R0,R0 LUI V0,0400 ORI V0,V0,0001 AND V0,S0,V0 BEQ V0,R0,80783218 SLTU V0,S6,S1 BNE V0,R0,8078321C LUI V0,0200 LUI A1,807A ADDIU A1,A1,A000 LW V1,0008 (A1) SLL V0,S2,0x1 MULT V1,V0 MFLO A1 ADDU S1,S1,A1 LUI V0,0200 ORI V0,V0,0004 AND V0,S0,V0 BEQ V0,R0,80783234 SLTU V0,S6,S1 BEQL V0,R0,80783234 ADDIU S1,S1,0008 LUI V0,0800 ORI V0,V0,0002 AND V0,S0,V0 BEQ V0,R0,80783268 SLL V0,S2,0x1 LUI A1,807A ADDIU A1,A1,A000 LW V1,0008 (A1) MULT V1,V0 MFLO V1 SLTU V0,V1,S1 BNEL V0,R0,80783268 SUBU S1,S1,V1 LUI V0,0100 ORI V0,V0,0008 AND V0,S0,V0 BEQ V0,R0,80783284 NOP BGTZL S1,80783284 ADDIU S1,S1,FFF8 BGEZ S0,80783298 LUI V0,0002 JAL 80793648 ;restore original game VI settings NOP LUI V0,0002 AND V0,S0,V0 BEQ V0,R0,807832B0 LUI A1,8079 LW V0,5968 (A1) ADDIU S5,S5,0001 SW S5,0000 (V0) LUI V0,0001 AND V0,S0,V0 BEQ V0,R0,807832CC LUI A1,8079 LW V0,5968 (A1) ADDIU S5,S5,FFFF SW S5,0000 (V0) LUI V0,0008 AND V0,S0,V0 BEQ V0,R0,807832EC LUI V0,0004 LW V0,596C (S8) ADDIU S4,S4,0001 SW S4,0000 (V0) LUI V0,0004 AND V0,S0,V0 BEQ V0,R0,80783308 LUI V0,0020 LW V0,596C (S8) ADDIU S4,S4,FFFF SW S4,0000 (V0) LUI V0,0020 AND V0,S0,V0 BEQ V0,R0,80783324 LUI V0,0010 LW V0,5964 (S7) ADDIU S3,S3,0001 SW S3,0000 (V0) LUI V0,0010 AND V0,S0,V0 BEQ V0,R0,80783340 LUI V1,003F LW V0,5964 (S7) ADDIU S3,S3,FFFF SW S3,0000 (V0) LUI V1,003F ORI V1,V1,FFFF AND V1,S1,V1 LUI A0,A000 LUI V0,8079 LW V0,5960 (V0) OR V1,V1,A0 SW V1,0000 (V0) LUI V0,1000 BNE S0,V0,807831B8 ADDU S0,V0,R0 JAL 80785EB8 ;V0=controller 1 buttons/stick state NOP BEQ V0,S0,80783368 NOP JAL 80785948 ADDU A0,R0,R0 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 807833B0 ADDIU SP,SP,FFD0 LUI V0,6980 ORI V0,V0,4BD5 SW S1,0024 (SP) LUI S1,8079 MULT A0,V0 LW V0,5984 (S1) SRA A0,A0,0x1F SW RA,0028 (SP) SW S0,0020 (SP) MFHI T0 SRA V1,T0,0xD SUBU S0,V1,A0 BEQ S0,V0,80783418 ADDIU V0,R0,008C SW V0,0010 (SP) ADDIU V0,R0,002A ADDIU A0,R0,0035 ADDIU A1,R0,00C9 ADDIU A2,S0,0004 ADDIU A3,R0,0009 SW V0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 80785460 ;wait until video refresh SW S0,5984 (S1) LW RA,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0030 8078342C BEQ A2,R0,8078344C ADDU V1,A0,R0 LBU V0,0000 (A1) ADDIU A1,A1,0001 ADDIU A2,A2,FFFF SB V0,0000 (V1) BNE A2,R0,80783434 ADDIU V1,V1,0001 JR RA ADDU V0,A0,R0 80783454 ADDIU SP,SP,FFE8 ADDU A1,R0,R0 SW RA,0010 (SP) JAL 80785B90 LUI A2,0008 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80783474 ADDIU SP,SP,FFE8 ADDIU A1,R0,00FF SW RA,0010 (SP) JAL 80785B90 LUI A2,0008 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80783494 SRA V0,A1,0x3 ADDU A0,A0,V0 ANDI A1,A1,0007 ADDIU V0,R0,0080 LBU V1,0000 (A0) SRAV V0,V0,A1 OR V1,V1,V0 JR RA SB V1,0000 (A0) 807834B8 SRA V0,A1,0x3 ADDU A0,A0,V0 ANDI A1,A1,0007 ADDIU V0,R0,0080 SRAV V0,V0,A1 LBU V1,0000 (A0) NOR V0,R0,V0 AND V1,V1,V0 JR RA SB V1,0000 (A0) 807834E0 SRA V0,A1,0x3 ADDU A0,A0,V0 LBU V0,0000 (A0) ANDI A1,A1,0007 ADDIU V1,R0,0080 SRAV V1,V1,A1 AND V0,V0,V1 JR RA SLTU V0,R0,V0 80783504 ADDIU SP,SP,FFC8 SW S5,0024 (SP) ADDU S5,A0,R0 SW S3,001C (SP) ADDU S3,R0,R0 SW S4,0020 (SP) ADDU S4,S3,R0 SW S8,0030 (SP) LUI S8,5555 ORI S8,S8,5556 SW S7,002C (SP) LUI S7,002A ORI S7,S7,AAAA SW S6,0028 (SP) LUI S6,0007 ORI S6,S6,FFFF SW S1,0014 (SP) ADDU S1,S3,R0 SW RA,0034 (SP) SW S2,0018 (SP) SW S0,0010 (SP) ADDU V0,S5,S3 LBU V0,0000 (V0) MULT S1,S8 BEQ V0,R0,8078359C NOP ADDU S0,R0,R0 ADDU S2,S1,R0 ADDU A0,S5,R0 JAL 807834E0 ADDU A1,S2,S0 BNEL V0,R0,80783588 ADDIU S4,S4,0001 ADDIU S0,S0,0001 SLTI V0,S0,0008 BNEL V0,R0,80783578 ADDU A0,S5,R0 MULT S1,S8 SRA A0,S1,0x1F ADDIU S1,S1,0008 ADDIU S3,S3,0001 MFHI V1 SUBU A0,V1,A0 JAL 807833B0 ADDU A0,A0,S7 SLT V0,S6,S3 BEQ V0,R0,8078355C ADDU V0,S5,S3 ADDU V0,S4,R0 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 807835F8 ADDIU SP,SP,FFC8 SW S5,0024 (SP) ADDU S5,A0,R0 SW S3,001C (SP) ADDU S3,R0,R0 SW S4,0020 (SP) ADDU S4,S3,R0 SW S8,0030 (SP) LUI S8,5555 ORI S8,S8,5556 SW S7,002C (SP) LUI S7,002A ORI S7,S7,AAAA SW S6,0028 (SP) LUI S6,0007 ORI S6,S6,FFFF SW S2,0018 (SP) ADDU S2,S3,R0 SW RA,0034 (SP) SW S1,0014 (SP) SW S0,0010 (SP) ADDU V0,S5,S3 LBU V0,0000 (V0) MULT S2,S8 BEQ V0,R0,80783690 NOP ADDU S1,R0,R0 ADDU S0,S2,R0 ADDU A0,S5,R0 JAL 807834E0 ADDU A1,S0,R0 BNEL V0,R0,8078367C ADDIU S4,S4,0001 ADDIU S1,S1,0001 SLTI V0,S1,0004 BNE V0,R0,80783668 ADDIU S0,S0,0002 MULT S2,S8 SRA A0,S2,0x1F ADDIU S2,S2,0008 ADDIU S3,S3,0001 MFHI V1 SUBU A0,V1,A0 JAL 807833B0 ADDU A0,A0,S7 SLT V0,S6,S3 BEQ V0,R0,80783650 ADDU V0,S5,S3 ADDU V0,S4,R0 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 807836EC ADDIU SP,SP,FFC8 SW S6,0028 (SP) ADDU S6,A0,R0 SW S8,0030 (SP) ADDU S8,A1,R0 SW S4,0020 (SP) ADDU S4,R0,R0 SW S2,0018 (SP) ADDU S2,S4,R0 SW S7,002C (SP) LUI S7,002D ORI S7,S7,9FFF SW S3,001C (SP) ADDU S3,S4,R0 SW RA,0034 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A2,0040 (SP) ADDU V0,S6,S4 LBU V0,0000 (V0) BEQ V0,R0,807837B8 LUI V0,5555 ADDU S1,R0,R0 ADDU S5,S3,R0 SLT V0,S7,S2 BNEL V0,R0,807837A8 ADDIU S1,S1,0001 ADDU A0,S6,R0 ADDU S0,S5,S1 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,807837A8 ADDIU S1,S1,0001 ADDU V1,S8,S2 LW A3,0040 (SP) LBU V1,0000 (V1) ADDU V0,A3,S0 LBU V0,0000 (V0) SLTU V0,V0,V1 BNEL V0,R0,807837A4 ADDIU S2,S2,0001 ADDU A0,S6,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0001 ADDIU S1,S1,0001 SLTI V0,S1,0008 BNE V0,R0,80783754 SLT V0,S7,S2 LUI V0,5555 ORI V0,V0,5556 MULT S3,V0 SRA A0,S3,0x1F ADDIU S3,S3,0008 ADDIU S4,S4,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S4 BEQL V0,R0,8078373C ADDU V0,S6,S4 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 8078381C ADDIU SP,SP,FFC8 SW S6,0028 (SP) ADDU S6,A0,R0 SW S8,0030 (SP) ADDU S8,A1,R0 SW S4,0020 (SP) ADDU S4,R0,R0 SW S2,0018 (SP) ADDU S2,S4,R0 SW S7,002C (SP) LUI S7,002D ORI S7,S7,9FFF SW S3,001C (SP) ADDU S3,S4,R0 SW RA,0034 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A2,0040 (SP) ADDU V0,S6,S4 LBU V0,0000 (V0) BEQ V0,R0,807838E8 LUI V0,5555 ADDU S1,R0,R0 ADDU S5,S3,R0 SLT V0,S7,S2 BNEL V0,R0,807838D8 ADDIU S1,S1,0001 ADDU A0,S6,R0 ADDU S0,S5,S1 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,807838D8 ADDIU S1,S1,0001 LW A3,0040 (SP) ADDU V1,S8,S2 ADDU V0,A3,S0 LBU A0,0000 (V0) LBU V0,0000 (V1) SLTU V0,V0,A0 BNEL V0,R0,807838D4 ADDIU S2,S2,0001 ADDU A0,S6,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0001 ADDIU S1,S1,0001 SLTI V0,S1,0008 BNE V0,R0,80783884 SLT V0,S7,S2 LUI V0,5555 ORI V0,V0,5556 MULT S3,V0 SRA A0,S3,0x1F ADDIU S3,S3,0008 ADDIU S4,S4,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S4 BEQL V0,R0,8078386C ADDU V0,S6,S4 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 8078394C ADDIU SP,SP,FFC8 SW S6,0028 (SP) ADDU S6,A0,R0 SW S8,0030 (SP) ADDU S8,A1,R0 SW S4,0020 (SP) ADDU S4,R0,R0 SW S2,0018 (SP) ADDU S2,S4,R0 SW S7,002C (SP) LUI S7,002D ORI S7,S7,9FFF SW S3,001C (SP) ADDU S3,S4,R0 SW RA,0034 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A2,0040 (SP) ADDU V0,S6,S4 LBU V0,0000 (V0) BEQ V0,R0,80783A10 LUI V0,5555 ADDU S1,R0,R0 ADDU S5,S3,R0 SLT V0,S7,S2 BNEL V0,R0,80783A00 ADDIU S1,S1,0001 ADDU A0,S6,R0 ADDU S0,S5,S1 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,80783A00 ADDIU S1,S1,0001 LW A3,0040 (SP) ADDU V1,S8,S2 ADDU V0,A3,S0 LBU A0,0000 (V0) LBU V0,0000 (V1) BEQ A0,V0,807839F8 ADDU A0,S6,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0001 ADDIU S1,S1,0001 SLTI V0,S1,0008 BNE V0,R0,807839B4 SLT V0,S7,S2 LUI V0,5555 ORI V0,V0,5556 MULT S3,V0 SRA A0,S3,0x1F ADDIU S3,S3,0008 ADDIU S4,S4,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S4 BEQL V0,R0,8078399C ADDU V0,S6,S4 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80783A74 ADDIU SP,SP,FFC8 SW S6,0028 (SP) ADDU S6,A0,R0 SW S8,0030 (SP) ADDU S8,A1,R0 SW S4,0020 (SP) ADDU S4,R0,R0 SW S2,0018 (SP) ADDU S2,S4,R0 SW S7,002C (SP) LUI S7,002D ORI S7,S7,9FFF SW S3,001C (SP) ADDU S3,S4,R0 SW RA,0034 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A2,0040 (SP) ADDU V0,S6,S4 LBU V0,0000 (V0) BEQ V0,R0,80783B3C LUI V0,5555 ADDU S1,R0,R0 ADDU S5,S3,R0 SLT V0,S7,S2 BNEL V0,R0,80783B2C ADDIU S1,S1,0001 ADDU A0,S6,R0 ADDU S0,S5,S1 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,80783B2C ADDIU S1,S1,0001 LW A3,0040 (SP) ADDU V1,S8,S2 ADDU V0,A3,S0 LBU A0,0000 (V0) LBU V0,0000 (V1) BNEL A0,V0,80783B28 ADDIU S2,S2,0001 ADDU A0,S6,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0001 ADDIU S1,S1,0001 SLTI V0,S1,0008 BNE V0,R0,80783ADC SLT V0,S7,S2 LUI V0,5555 ORI V0,V0,5556 MULT S3,V0 SRA A0,S3,0x1F ADDIU S3,S3,0008 ADDIU S4,S4,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S4 BEQL V0,R0,80783AC4 ADDU V0,S6,S4 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80783BA0 ADDIU SP,SP,FFC8 SW S7,002C (SP) ADDU S7,A0,R0 SW S8,0030 (SP) ADDU S8,A1,R0 SW S4,0020 (SP) ADDU S4,R0,R0 SW S2,0018 (SP) ADDU S2,S4,R0 SW S6,0028 (SP) LUI S6,002D ORI S6,S6,9FFF SW S3,001C (SP) ADDU S3,S4,R0 SW RA,0034 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A2,0040 (SP) ADDU V0,S7,S4 LBU V0,0000 (V0) BEQ V0,R0,80783C50 LUI V0,5555 ADDU S1,R0,R0 ADDU S5,S3,R0 SLT V0,S6,S2 BNEL V0,R0,80783C40 ADDIU S1,S1,0001 ADDU A0,S7,R0 ADDU S0,S5,S1 JAL 807834E0 ADDU A1,S0,R0 BEQ V0,R0,80783C40 ADDIU S1,S1,0001 LW A3,0040 (SP) ADDU V0,S8,S2 ADDU V1,A3,S0 LBU V1,0000 (V1) ADDIU S2,S2,0001 SB V1,0000 (V0) SLTI V0,S1,0008 BNE V0,R0,80783C08 SLT V0,S6,S2 LUI V0,5555 ORI V0,V0,5556 LUI V1,0015 MULT S3,V0 ORI V1,V1,5555 SRA A0,S3,0x1F ADDIU S3,S3,0008 ADDIU S4,S4,0001 MFHI A3 SUBU A0,A3,A0 JAL 807833B0 ADDU A0,A0,V1 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S4 BEQL V0,R0,80783BF0 ADDU V0,S7,S4 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80783CC0 ADDIU SP,SP,FFC8 SW S8,0030 (SP) ADDU S8,A0,R0 SW S5,0024 (SP) ADDU S5,R0,R0 SW S3,001C (SP) ADDU S3,S5,R0 SW S7,002C (SP) LUI S7,0016 ORI S7,S7,CFFF SW S4,0020 (SP) ADDU S4,S5,R0 SW RA,0034 (SP) SW S6,0028 (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A1,003C (SP) SW A2,0040 (SP) ADDU V0,S8,S5 LBU V0,0000 (V0) BEQ V0,R0,80783D80 SLL V0,S3,0x1 ADDU S0,R0,R0 SLL S6,S5,0x2 ADDU S2,S4,R0 LW A3,003C (SP) ADDU S1,V0,A3 SLT V0,S7,S3 BNEL V0,R0,80783D74 ADDIU S0,S0,0001 ADDU A0,S8,R0 JAL 807834E0 ADDU A1,S2,R0 BEQL V0,R0,80783D74 ADDIU S0,S0,0001 ADDU V0,S6,S0 LW A3,0040 (SP) SLL V0,V0,0x1 ADDU V0,V0,A3 LHU V0,0000 (V0) ADDIU S3,S3,0001 SH V0,0000 (S1) ADDIU S1,S1,0002 ADDIU S0,S0,0001 SLTI V0,S0,0004 BNE V0,R0,80783D30 ADDIU S2,S2,0002 LUI V0,5555 ORI V0,V0,5556 LUI V1,0015 MULT S4,V0 ORI V1,V1,5555 SRA A0,S4,0x1F ADDIU S4,S4,0008 ADDIU S5,S5,0001 MFHI A3 SUBU A0,A3,A0 JAL 807833B0 ADDU A0,A0,V1 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S5 BEQL V0,R0,80783D10 ADDU V0,S8,S5 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80783DF4 ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 LUI V0,003F ORI V0,V0,FFFF SLT V0,V0,S0 SW RA,001C (SP) SW S2,0018 (SP) BNE V0,R0,80783E50 SW S1,0014 (SP) LUI S2,807A LUI S1,003F ORI S1,S1,FFFF LW A0,B308 (S2) JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,80783E44 ADDIU S0,S0,0001 J 80783E50 ADDU V0,S0,R0 SLT V0,S1,S0 BEQ V0,R0,80783E28 NOP LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80783E68 ADDIU SP,SP,FFC8 SW S7,002C (SP) ADDU S7,A0,R0 SW S5,0024 (SP) ADDU S5,R0,R0 SW S3,001C (SP) ADDU S3,S5,R0 SW S8,0030 (SP) LUI S8,0016 ORI S8,S8,CFFF SW S4,0020 (SP) ADDU S4,S5,R0 SW RA,0034 (SP) SW S6,0028 (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A1,003C (SP) SW A2,0040 (SP) ADDU V0,S7,S5 LBU V0,0000 (V0) BEQ V0,R0,80783F40 SLL V0,S3,0x1 ADDU S1,R0,R0 SLL S6,S5,0x2 ADDU S0,S4,R0 LW A3,003C (SP) ADDU S2,V0,A3 SLT V0,S8,S3 BNEL V0,R0,80783F34 ADDIU S1,S1,0001 ADDU A0,S7,R0 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,80783F34 ADDIU S1,S1,0001 ADDU V0,S6,S1 SLL V0,V0,0x1 LW A3,0040 (SP) LH V1,0000 (S2) ADDU V0,V0,A3 LH V0,0000 (V0) SLT V0,V0,V1 BNEL V0,R0,80783F2C ADDIU S2,S2,0002 ADDU A0,S7,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0002 ADDIU S3,S3,0001 ADDIU S1,S1,0001 SLTI V0,S1,0004 BNE V0,R0,80783ED8 ADDIU S0,S0,0002 LUI V0,5555 ORI V0,V0,5556 MULT S4,V0 SRA A0,S4,0x1F ADDIU S4,S4,0008 ADDIU S5,S5,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S5 BEQL V0,R0,80783EB8 ADDU V0,S7,S5 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80783FA8 ADDIU SP,SP,FFC8 SW S7,002C (SP) ADDU S7,A0,R0 SW S5,0024 (SP) ADDU S5,R0,R0 SW S3,001C (SP) ADDU S3,S5,R0 SW S8,0030 (SP) LUI S8,0016 ORI S8,S8,CFFF SW S4,0020 (SP) ADDU S4,S5,R0 SW RA,0034 (SP) SW S6,0028 (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A1,003C (SP) SW A2,0040 (SP) ADDU V0,S7,S5 LBU V0,0000 (V0) BEQ V0,R0,80784080 SLL V0,S3,0x1 ADDU S1,R0,R0 SLL S6,S5,0x2 ADDU S0,S4,R0 LW A3,003C (SP) ADDU S2,V0,A3 SLT V0,S8,S3 BNEL V0,R0,80784074 ADDIU S1,S1,0001 ADDU A0,S7,R0 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,80784074 ADDIU S1,S1,0001 ADDU V0,S6,S1 LW A3,0040 (SP) SLL V0,V0,0x1 ADDU V0,V0,A3 LH V1,0000 (V0) LH V0,0000 (S2) SLT V0,V0,V1 BNEL V0,R0,8078406C ADDIU S2,S2,0002 ADDU A0,S7,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0002 ADDIU S3,S3,0001 ADDIU S1,S1,0001 SLTI V0,S1,0004 BNE V0,R0,80784018 ADDIU S0,S0,0002 LUI V0,5555 ORI V0,V0,5556 MULT S4,V0 SRA A0,S4,0x1F ADDIU S4,S4,0008 ADDIU S5,S5,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S5 BEQL V0,R0,80783FF8 ADDU V0,S7,S5 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 807840E8 ADDIU SP,SP,FFC8 SW S7,002C (SP) ADDU S7,A0,R0 SW S5,0024 (SP) ADDU S5,R0,R0 SW S3,001C (SP) ADDU S3,S5,R0 SW S8,0030 (SP) LUI S8,0016 ORI S8,S8,CFFF SW S4,0020 (SP) ADDU S4,S5,R0 SW RA,0034 (SP) SW S6,0028 (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A1,003C (SP) SW A2,0040 (SP) ADDU V0,S7,S5 LBU V0,0000 (V0) BEQ V0,R0,807841B8 SLL V0,S3,0x1 ADDU S1,R0,R0 SLL S6,S5,0x2 ADDU S0,S4,R0 LW A3,003C (SP) ADDU S2,V0,A3 SLT V0,S8,S3 BNEL V0,R0,807841AC ADDIU S1,S1,0001 ADDU A0,S7,R0 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,807841AC ADDIU S1,S1,0001 ADDU V0,S6,S1 LW A3,0040 (SP) SLL V0,V0,0x1 ADDU V0,V0,A3 LH V1,0000 (V0) LH V0,0000 (S2) BEQ V1,V0,807841A0 ADDU A0,S7,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0002 ADDIU S3,S3,0001 ADDIU S1,S1,0001 SLTI V0,S1,0004 BNE V0,R0,80784158 ADDIU S0,S0,0002 LUI V0,5555 ORI V0,V0,5556 MULT S4,V0 SRA A0,S4,0x1F ADDIU S4,S4,0008 ADDIU S5,S5,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S5 BEQL V0,R0,80784138 ADDU V0,S7,S5 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80784220 ADDIU SP,SP,FFC8 SW S7,002C (SP) ADDU S7,A0,R0 SW S5,0024 (SP) ADDU S5,R0,R0 SW S3,001C (SP) ADDU S3,S5,R0 SW S8,0030 (SP) LUI S8,0016 ORI S8,S8,CFFF SW S4,0020 (SP) ADDU S4,S5,R0 SW RA,0034 (SP) SW S6,0028 (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SW A1,003C (SP) SW A2,0040 (SP) ADDU V0,S7,S5 LBU V0,0000 (V0) BEQ V0,R0,807842F4 SLL V0,S3,0x1 ADDU S1,R0,R0 SLL S6,S5,0x2 ADDU S0,S4,R0 LW A3,003C (SP) ADDU S2,V0,A3 SLT V0,S8,S3 BNEL V0,R0,807842E8 ADDIU S1,S1,0001 ADDU A0,S7,R0 JAL 807834E0 ADDU A1,S0,R0 BEQL V0,R0,807842E8 ADDIU S1,S1,0001 ADDU V0,S6,S1 LW A3,0040 (SP) SLL V0,V0,0x1 ADDU V0,V0,A3 LH V1,0000 (V0) LH V0,0000 (S2) BNEL V1,V0,807842E0 ADDIU S2,S2,0002 ADDU A0,S7,R0 JAL 807834B8 ADDU A1,S0,R0 ADDIU S2,S2,0002 ADDIU S3,S3,0001 ADDIU S1,S1,0001 SLTI V0,S1,0004 BNE V0,R0,80784290 ADDIU S0,S0,0002 LUI V0,5555 ORI V0,V0,5556 MULT S4,V0 SRA A0,S4,0x1F ADDIU S4,S4,0008 ADDIU S5,S5,0001 MFHI A3 JAL 807833B0 SUBU A0,A3,A0 LUI V0,0007 ORI V0,V0,FFFF SLT V0,V0,S5 BEQL V0,R0,80784270 ADDU V0,S7,S5 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 8078435C ADDIU SP,SP,FFD0 SW S1,0014 (SP) ADDU S1,A0,R0 SW S5,0024 (SP) ADDU S5,A2,R0 SW S0,0010 (SP) ADDU S0,R0,R0 SW S4,0020 (SP) ANDI S4,A3,00FF SW S3,001C (SP) LUI S3,5555 ORI S3,S3,5556 SW S2,0018 (SP) LUI S2,003F ORI S2,S2,FFFF SW RA,0028 (SP) ADDU A0,S1,R0 JAL 807834E0 ADDU A1,S0,R0 BEQ V0,R0,807843CC ADDU V0,S5,S0 LBU V0,0000 (V0) MULT S0,S3 BEQ V0,S4,807843D0 NOP ADDU A0,S1,R0 JAL 807834B8 ADDU A1,S0,R0 MULT S0,S3 SRA A0,S0,0x1F ADDIU S0,S0,0001 MFHI V1 JAL 807833B0 SUBU A0,V1,A0 SLT V0,S2,S0 BEQL V0,R0,807843A0 ADDU A0,S1,R0 LW RA,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 80784414 ADDIU SP,SP,FFD0 SW S3,001C (SP) ADDU S3,A0,R0 SW S2,0018 (SP) ADDU S2,R0,R0 SLL A3,A3,0x10 SW S6,0028 (SP) SRA S6,A3,0x10 SW S5,0024 (SP) LUI S5,5555 ORI S5,S5,5556 SW S4,0020 (SP) LUI S4,001F ORI S4,S4,FFFF SW S0,0010 (SP) ADDU S0,S2,R0 SW S1,0014 (SP) ADDU S1,A2,R0 SW RA,002C (SP) ADDU A0,S3,R0 JAL 807834E0 ADDU A1,S0,R0 MULT S0,S5 BEQ V0,R0,80784494 NOP LH V0,0000 (S1) BEQL V0,S6,80784498 SRA A0,S0,0x1F ADDU A0,S3,R0 JAL 807834B8 ADDU A1,S0,R0 MULT S0,S5 SRA A0,S0,0x1F ADDIU S0,S0,0002 ADDIU S1,S1,0002 ADDIU S2,S2,0001 MFHI V1 JAL 807833B0 SUBU A0,V1,A0 SLT V0,S4,S2 BEQL V0,R0,80784464 ADDU A0,S3,R0 LW RA,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 807844E4 ADDIU SP,SP,FFE8 ADDIU A1,R0,00AA SW RA,0010 (SP) JAL 80785B90 LUI A2,0008 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80784504 ADDIU SP,SP,FFC8 SW S0,0018 (SP) ADDU S0,A0,R0 SW S3,0024 (SP) ADDU S3,A1,R0 ADDIU V0,R0,0001 SW RA,0034 (SP) SW S6,0030 (SP) SW S5,002C (SP) SW S4,0028 (SP) SW S2,0020 (SP) BNE S0,V0,80784544 SW S1,001C (SP) ADDIU V0,R0,FFFF BEQ S3,V0,80784588 ADDIU V1,S0,FFFF JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LUI V0,807A LUI V1,807A LW V1,B318 (V1) LW S6,B238 (V0) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb SW V1,B238 (V0) JAL 80785460 ;wait until video refresh NOP ADDIU A0,R0,0031 ADDIU A1,R0,00C5 ADDIU A2,R0,00DE ADDIU A3,R0,0011 JAL 8078FBC4 SW R0,0010 (SP) ADDIU V1,S0,FFFF SLTIU V0,V1,0020 BEQ V0,R0,807848F0 LUI V0,8079 ADDIU V0,V0,4E30 SLL V1,V1,0x2 ADDU V1,V1,V0 LW V0,0000 (V1) JR V0 NOP LUI V1,807A LUI V0,A040 SW V0,B308 (V1) ;A0400000->8079B308: LUI V1,807A LUI V0,A048 SW V0,B320 (V1) ;A0480000->8079B320: LUI V1,807A LUI V0,A000 SW V0,B324 (V1) ;A0000000->8079B324: LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQ V1,V0,807845F4 ADDIU V0,R0,0010 BEQ V1,V0,80784604 ADDIU V0,R0,FFFF J 80784610 NOP JAL 80783474 LUI A0,A040 J 80784610 ADDIU V0,R0,FFFF JAL 807844E4 LUI A0,A040 ADDIU V0,R0,FFFF BEQ S3,V0,80784910 ADDU S0,R0,R0 LUI S3,002D ORI S3,S3,9FFF LUI S5,807A LUI S4,807A LUI S2,5555 ORI S2,S2,5556 LUI S1,003F ORI S1,S1,FFFF SLT V0,S3,S0 BNE V0,R0,8078465C SLL A0,S0,0x1 LW V0,B324 (S4) LW V1,B320 (S5) ADDU V0,V0,S0 LBU V0,0000 (V0) ADDU V1,V1,S0 SB V0,0000 (V1) MULT A0,S2 ADDIU S0,S0,0001 SRA A0,A0,0x1F MFHI T0 JAL 807833B0 SUBU A0,T0,A0 SLT V0,S1,S0 BEQ V0,R0,8078463C SLT V0,S3,S0 J 807848F4 LUI V0,807A LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQ V1,V0,807846AC ADDIU V0,R0,0010 BEQ V1,V0,807846D4 LUI V0,807A J 807848F8 LUI V1,807A LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 8078394C NOP J 8078489C NOP LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 807840E8 NOP J 807848DC NOP LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQ V1,V0,80784720 ADDIU V0,R0,0010 BEQ V1,V0,80784748 LUI V0,807A J 807848F8 LUI V1,807A LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80783A74 NOP J 8078489C NOP LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80784220 NOP J 807848DC NOP LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQ V1,V0,80784794 ADDIU V0,R0,0010 BEQ V1,V0,807847BC LUI V0,807A J 807848F8 LUI V1,807A LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 807836EC NOP J 8078489C NOP LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80783E68 NOP J 807848DC NOP LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQ V1,V0,80784808 ADDIU V0,R0,0010 BEQ V1,V0,80784830 LUI V0,807A J 807848F8 LUI V1,807A LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 8078381C NOP J 8078489C NOP LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80783FA8 NOP J 807848DC NOP LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQ V1,V0,8078487C ADDIU V0,R0,0010 BEQ V1,V0,807848B8 LUI V0,807A J 807848F8 LUI V1,807A LUI S2,807A LUI S1,807A LUI S0,807A LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 8078435C ANDI A3,S3,00FF LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80783BA0 NOP J 807848F4 LUI V0,807A LUI S2,807A LUI S1,807A LUI S0,807A SLL A3,S3,0x10 LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80784414 SRA A3,A3,0x10 LW A0,B308 (S2) LW A1,B320 (S1) LW A2,B324 (S0) JAL 80783CC0 NOP LUI V0,807A LUI V1,807A LW A0,B308 (V0) ADDIU V0,R0,0001 JAL 80783504 SW V0,B1D8 (V1) LUI V1,807A SW S6,B238 (V1) LW RA,0034 (SP) LW S6,0030 (SP) LW S5,002C (SP) LW S4,0028 (SP) LW S3,0024 (SP) LW S2,0020 (SP) LW S1,001C (SP) LW S0,0018 (SP) JR RA ADDIU SP,SP,0038 80784938 likely data ;BNE A2,R0,80784920 ;ADDI K1,K1,0002 80784940 fill region {A0,A1} to {A2,A3} with colour accepts: A0=ulx, A1=uly, A2=lrx, A3=lry ADDI SP,SP,FFFC SW S0,0000 (SP) ADDI SP,SP,FFFC SW S1,0000 (SP) ADDI SP,SP,FFFC SW S2,0000 (SP) ADDI SP,SP,FFFC SW S3,0000 (SP) ADDI SP,SP,FFFC SW S4,0000 (SP) ADDI SP,SP,FFFC SW S5,0000 (SP) ADDI SP,SP,FFFC SW S6,0000 (SP) ADDI SP,SP,FFFC SW S7,0000 (SP) //80784980: fix to fit within screen width ADDIU V0,R0,0140 ;V0=140: screen width SUB V0,V0,A2 ;V0-=A2 SUB V0,V0,A0 ;V0-=A0: width-ulx-lrx BGEZ V0,80784998 ;branch if not filling more than width NOP ADD A2,A2,V0 ;A2=width-ulx //80784998: AND A0,A0,A0 ;this is a stupid OP BGEZ A0,807849AC ;branch if ulx isn't zero or less NOP ADD A2,A2,A0 ;A2+=A0: lrx+=ulx XOR A0,A0,A0 ;A0=0 //807849AC: fix to fit within screen height ADDIU V0,R0,00F0 ;V0=F0: screen height SUB V0,V0,A3 SUB V0,V0,A1 ;V0=height-uly-lry BGEZ V0,807849C4 ;branch if not filling more than height NOP ADD A3,A3,V0 ;A3+=V0: height-uly //807849C4: AND A1,A1,A1 ;another stupid OP BGEZ A1,807849D8 ;branch if uly isn't zero or less NOP ADD A3,A3,A1 ;A3+=A1: lry+=uly XOR A1,A1,A1 ;A1=0 //807849D8: BLEZ A2,80784D58 NOP BLEZ A3,80784D58 NOP ADDIU S0,R0,0280 ;S0=280: #bytes per row MULT A1,S0 MFLO S0 LUI K1,807A LW K1,B238 (K1) ADD K1,K1,S0 ADD K1,K1,A0 ADD K1,K1,A0 LUI V0,8078 ORI V0,V0,4A44 ANDI A0,A0,0003 SLL A0,A0,0x2 ADD V0,V0,A0 ADDI A1,A2,0000 LUI A0,8079 ORI A0,A0,B228 LD A0,0000 (A0) ANDI A2,A2,FFFC BEQ A2,R0,80784D24 NOP LW V0,0000 (V0) JR V0 NOP LB T8,4A54 (V1) LB T8,4AF0 (V1) LB T8,4BBC (V1) LB T8,4C70 (V1) ADDI A1,A1,0000 ADDI SP,SP,FFFC SW K1,0000 (SP) ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80784A7C ADDI A2,A2,FFFF SD A0,0000 (K1) BNE A2,R0,80784A6C ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,80784A94 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784A84 ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF BNE A3,R0,80784A58 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI A1,A1,FFFD ADDI SP,SP,FFFC SW K1,0000 (SP) ADDIU A2,R0,0001 BEQ A2,R0,80784B14 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784B04 ADDI K1,K1,0002 ADDIU A2,R0,0001 BEQ A2,R0,80784B2C ADDI A2,A2,FFFF SW A0,0000 (K1) BNE A2,R0,80784B1C ADDI K1,K1,0004 ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80784B48 ADDI A2,A2,FFFF SD A0,0000 (K1) BNE A2,R0,80784B38 ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,80784B60 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784B50 ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF BNE A3,R0,80784AF4 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI A1,A1,FFFE ADDI SP,SP,FFFC SW K1,0000 (SP) ADDIU A2,R0,0001 BEQ A2,R0,80784BE0 ADDI A2,A2,FFFF SW A0,0000 (K1) BNE A2,R0,80784BD0 ADDI K1,K1,0004 ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80784BFC ADDI A2,A2,FFFF SD A0,0000 (K1) BNE A2,R0,80784BEC ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,80784C14 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784C04 ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF BNE A3,R0,80784BC0 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI A1,A1,FFFF ADDI SP,SP,FFFC SW K1,0000 (SP) ADDIU A2,R0,0001 BEQ A2,R0,80784C94 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784C84 ADDI K1,K1,0002 ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80784CB0 ADDI A2,A2,FFFF SD A0,0000 (K1) BNE A2,R0,80784CA0 ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,80784CC8 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784CB8 ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF BNE A3,R0,80784C74 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI SP,SP,FFFC SW K1,0000 (SP) ADDI A2,A1,0000 BEQ A2,R0,80784D44 ADDI A2,A2,FFFF SH A0,0000 (K1) BNE A2,R0,80784D34 ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF BNE A3,R0,80784D24 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP 80784DA0 ADDI SP,SP,FFFC SW S0,0000 (SP) ADDI SP,SP,FFFC SW S1,0000 (SP) ADDI SP,SP,FFFC SW S2,0000 (SP) ADDI SP,SP,FFFC SW S3,0000 (SP) ADDI SP,SP,FFFC SW S4,0000 (SP) ADDI SP,SP,FFFC SW S5,0000 (SP) ADDI SP,SP,FFFC SW S6,0000 (SP) ADDI SP,SP,FFFC SW S7,0000 (SP) ADDIU V0,R0,0140 SUB V0,V0,A2 SUB V0,V0,A0 BGEZ V0,80784DF8 NOP ADD A2,A2,V0 AND A0,A0,A0 BGEZ A0,80784E0C NOP ADD A2,A2,A0 XOR A0,A0,A0 ADDIU V0,R0,00F0 SUB V0,V0,A3 SUB V0,V0,A1 BGEZ V0,80784E24 NOP ADD A3,A3,V0 AND A1,A1,A1 BGEZ A1,80784E38 NOP ADD A3,A3,A1 XOR A1,A1,A1 BLEZ A2,807852FC NOP BLEZ A3,807852FC NOP ADDIU S0,R0,0280 MULT A1,S0 MFLO S0 LUI K1,807A LW K1,B238 (K1) ADD K1,K1,S0 ADD K1,K1,A0 ADD K1,K1,A0 ADDU K0,K1,R0 LUI V0,DFFF ORI V0,V0,FFFF AND K0,K0,V0 LUI V0,8078 ORI V0,V0,4EB4 ANDI A0,A0,0003 SLL A0,A0,0x2 ADD A0,A0,V0 LW A0,0000 (A0) ADDI A1,A2,0000 LUI V0,8079 ORI V0,V0,B300 LD V0,0000 (V0) ANDI A2,A2,FFFC BEQ A2,R0,807852A4 NOP JR A0 NOP LB T8,4EC4 (V1) LB T8,4F94 (V1) LB T8,50B4 (V1) LB T8,51AC (V1) ADDI A1,A1,0000 ADDI SP,SP,FFFC SW K0,0000 (SP) ADDI SP,SP,FFFC SW K1,0000 (SP) ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80784F04 ADDI A2,A2,FFFF LD A0,0000 (K0) AND A0,A0,V0 DSRL A0,A0,0x1 SD A0,0000 (K1) ADDI K0,K0,0008 BNE A2,R0,80784EE4 ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,80784F2C ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,80784F0C ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 LW K0,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF ADDI K0,K0,0280 BNE A3,R0,80784EC8 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI A1,A1,FFFD ADDI SP,SP,FFFC SW K0,0000 (SP) ADDI SP,SP,FFFC SW K1,0000 (SP) ADDIU A2,R0,0001 BEQ A2,R0,80784FD0 ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,80784FB0 ADDI K1,K1,0002 ADDIU A2,R0,0001 BEQ A2,R0,80784FF8 ADDI A2,A2,FFFF LW A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SW A0,0000 (K1) ADDI K0,K0,0004 BNE A2,R0,80784FD8 ADDI K1,K1,0004 ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80785024 ADDI A2,A2,FFFF LD A0,0000 (K0) AND A0,A0,V0 DSRL A0,A0,0x1 SD A0,0000 (K1) ADDI K0,K0,0008 BNE A2,R0,80785004 ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,8078504C ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,8078502C ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 LW K0,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF ADDI K0,K0,0280 BNE A3,R0,80784F98 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI A1,A1,FFFE ADDI SP,SP,FFFC SW K0,0000 (SP) ADDI SP,SP,FFFC SW K1,0000 (SP) ADDIU A2,R0,0001 BEQ A2,R0,807850F0 ADDI A2,A2,FFFF LW A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SW A0,0000 (K1) ADDI K0,K0,0004 BNE A2,R0,807850D0 ADDI K1,K1,0004 ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,8078511C ADDI A2,A2,FFFF LD A0,0000 (K0) AND A0,A0,V0 DSRL A0,A0,0x1 SD A0,0000 (K1) ADDI K0,K0,0008 BNE A2,R0,807850FC ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,80785144 ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,80785124 ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 LW K0,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF ADDI K0,K0,0280 BNE A3,R0,807850B8 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI A1,A1,FFFF ADDI SP,SP,FFFC SW K0,0000 (SP) ADDI SP,SP,FFFC SW K1,0000 (SP) ADDIU A2,R0,0001 BEQ A2,R0,807851E8 ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,807851C8 ADDI K1,K1,0002 ADDI A2,A1,0000 SRL A2,A2,0x2 BEQ A2,R0,80785214 ADDI A2,A2,FFFF LD A0,0000 (K0) AND A0,A0,V0 DSRL A0,A0,0x1 SD A0,0000 (K1) ADDI K0,K0,0008 BNE A2,R0,807851F4 ADDI K1,K1,0008 ANDI A2,A1,0003 BEQ A2,R0,8078523C ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,8078521C ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 LW K0,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF ADDI K0,K0,0280 BNE A3,R0,807851B0 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP ADDI SP,SP,FFFC SW K0,0000 (SP) ADDI SP,SP,FFFC SW K1,0000 (SP) ADDI A2,A1,0000 BEQ A2,R0,807852DC ADDI A2,A2,FFFF LH A0,0000 (K0) AND A0,A0,V0 SRL A0,A0,0x1 SH A0,0000 (K1) ADDI K0,K0,0002 BNE A2,R0,807852BC ADDI K1,K1,0002 LW K1,0000 (SP) ADDI SP,SP,0004 LW K0,0000 (SP) ADDI SP,SP,0004 ADDI A3,A3,FFFF ADDI K0,K0,0280 BNE A3,R0,807852A4 ADDI K1,K1,0280 LW S7,0000 (SP) ADDI SP,SP,0004 LW S6,0000 (SP) ADDI SP,SP,0004 LW S5,0000 (SP) ADDI SP,SP,0004 LW S4,0000 (SP) ADDI SP,SP,0004 LW S3,0000 (SP) ADDI SP,SP,0004 LW S2,0000 (SP) ADDI SP,SP,0004 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP 80785344 SW V0,0008 (T2) ADDIU V0,R0,020D SW A0,0014 (T2) SLL A2,A2,0xB SLL A3,A3,0x6 OR A2,A2,A3 LUI V1,807A LW V0,0010 (SP) LW V1,B238 (V1) SLL V0,V0,0x1 OR A2,A2,V0 SLL V0,A1,0x2 ADDU V0,V0,A1 SLL V0,V0,0x6 ADDU V0,V0,A0 SLL V0,V0,0x1 ADDU V0,V0,V1 JR RA SH A2,0000 (V0) 80785390 LW T3,0010 (SP) BLEZ A3,807853F0 ADDU T1,R0,R0 LUI V0,807A LW T2,B318 (V0) BLEZ A2,807853E0 ADDU T0,R0,R0 ADDU V1,A1,T1 SLL V0,V1,0x2 ADDU V0,V0,V1 SLL V1,V0,0x6 ADDU V0,A0,T0 ADDU V0,V1,V0 SLL V0,V0,0x1 ADDU V0,V0,T2 SH T3,0000 (V0) ADDIU T0,T0,0001 SLT V0,T0,A2 BNE V0,R0,807853C0 ADDU V0,A0,T0 ADDIU T1,T1,0001 SLT V0,T1,A3 BNE V0,R0,807853A4 NOP JR RA NOP 807853F8 ADDIU SP,SP,FFE8 LUI V0,807A ADDU V1,R0,R0 LUI A1,0001 LW A0,B318 (V0) ORI A1,A1,2BFF SW RA,0010 (SP) SH R0,0000 (A0) ADDIU V1,V1,0001 SLT V0,A1,V1 BEQ V0,R0,80785414 ADDIU A0,A0,0002 ADDU T0,R0,R0 ADDU T1,R0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LUI AT,807A SW T0,B228 (AT) LUI AT,807A SW T1,B22C (AT) JAL 80784940 ;fill region {A0,A1} to {A2,A3} with colour ADDIU A3,R0,00F0 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80785460 wait until video refresh LUI A0,A440 LW V0,0010 (A0) ;V0=A4400010: VI cur.line ADDIU V1,R0,01D8 ;V1=#lines ANDI V0,V0,03FE BEQ V0,V1,8078548C ;branch if at end of draw NOP //80785478: loop until at final line LW V0,0010 (A0) ;V0=A4400010: VI cur.line ANDI V0,V0,03FE BNE V0,V1,80785478 ;loop until at end of draw NOP ADDIU V1,R0,01D8 //8078548C: wait until refreshing LW V0,0010 (A0) ;V0=A4400010: VI cur.line ANDI V0,V0,03FE BEQ V0,V1,8078548C ;loop until redrawing NOP //8078549C: return JR RA NOP 807854A4 A0->VI dram address LUI V0,A440 SW A0,0004 (V0) ;A0->A4400004: dram JR RA NOP 807854B4 display and swap video buffers ADDIU SP,SP,FFE8 SW RA,0014 (SP) JAL 80785460 ;wait until video refresh SW S0,0010 (SP) LUI S0,807A LUI V0,807A LW V1,B238 (S0) ;V1=8079B238: p->screen buffer LW A0,B254 (V0) ;A0=8079B254: JAL 807854A4 ;A0->VI dram address ADDU A0,V1,A0 ;A0+=V1: p->current video buffer //807854DC: swap buffers LUI V0,807A LW A0,B318 (V0) ;A0=8079B318: p->alt.screen buffer LW V1,B238 (S0) ;V1=8079B238: p->screen buffer LW RA,0014 (SP) SW A0,B238 (S0) ;A0->8079B238: save p->alt.screen buffer as cur LW S0,0010 (SP) SW V1,B318 (V0) ;V1->8079B318: save p->screen buffer as alt JR RA ADDIU SP,SP,0018 80785500 draw character A0 using cur.display settings accepts: A0=char ADDIU SP,SP,FFE8 ADDU A2,A0,R0 ;A2=A0: char SW S0,0010 (SP) LUI S0,807A LUI V0,807A LUI V1,807A LW A0,B32C (S0) ;A0=8079B32C: xpos LW A1,B330 (V0) ;A1=8079B330: ypos LW A3,B250 (V1) ;A3=8079B250: colour SW RA,0014 (SP) JAL 8078ED30 ;display character A2 in colour A3 at {A0,A1} NOP LW V0,B32C (S0) ;V0=8079B32C: xpos LW RA,0014 (SP) ADDIU V0,V0,0008 ;V0+=8: update xpos SW V0,B32C (S0) ;save updated xpos LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 8078554C display string A0 using current display settings; 80-83 special accepts: A0=p->string ADDIU SP,SP,FFD8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: p->string SW RA,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) LBU V0,0000 (S0) ;V0=char from string BEQ V0,R0,807855C0 ;quit if NULL LUI S1,807A LUI S3,807A LUI S2,807A //8078557C: LBU A2,0000 (S0) ;A2=char from string ADDIU V0,A2,FF80 ;V0-=80: detect special characters SLTIU V0,V0,0004 BEQ V0,R0,80785594 ;branch if not 80,81,82,83 ADDIU S0,S0,0001 ;S0++ p->next char ADDIU A2,A2,0021 ;A2+=21: A1,A2,A3,A4 LW A0,B32C (S1) ;A0=8079B32C: cur.xpos LW A1,B330 (S3) ;A1=8079B330: cur.ypos LW A3,B250 (S2) ;A3=8079B250: cur.colour JAL 8078ED30 ;display character A2 in colour A3 at {A0,A1} NOP LW V0,B32C (S1) ;V0=8079B32C: cur.xpos ADDIU V0,V0,0008 ;V0+=8 update xpos SW V0,B32C (S1) ;save updated xpos LBU V0,0000 (S0) ;V0=next char from string BNE V0,R0,8078557C ;loop until NULL found NOP //807855C0: return LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 807855DC display nibble A0 using cur.display settings accepts: A0=nibble ADDIU SP,SP,FFE8 ANDI A0,A0,000F ;A0&=F: nibble SLTI V0,A0,000A BNE V0,R0,807855F8 ;branch if 0-9 SW RA,0010 (SP) J 807855FC ADDIU A0,A0,0037 ;A0+=37: converts 0xA-0xF to text //807855F8: ADDIU A0,A0,0030 ;A0+=30: converts 0-9 to text //807855FC: display JAL 80785500 ;draw character A0 using cur.display settings NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80785610 display byte A0 using cur.display settings accepts: A0=byte ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: byte SW RA,0014 (SP) JAL 807855DC ;display nibble A0 using cur.display settings SRA A0,S0,0x4 ;A0=S0>>4: high nibble JAL 807855DC ;display nibble A0 using cur.display settings ADDU A0,S0,R0 ;A0=S0: low nibble LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785640 display short A0 using cur.display settings accepts: A0=short ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: short SW RA,0014 (SP) JAL 80785610 ;display byte A0 using cur.display settings SRA A0,S0,0x8 ;A0=S0>>8: high byte JAL 80785610 ;display byte A0 using cur.display settings ADDU A0,S0,R0 ;A0=S0: low byte LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785670 display word A0 using cur.display settings accepts: A0=word ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: word SW RA,0014 (SP) JAL 80785640 ;display short A0 using cur.display settings SRA A0,S0,0x10 ;A0=S0>>10: high short JAL 80785640 ;display short A0 using cur.display settings ADDU A0,S0,R0 ;A0=S0: low short LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 807856A0 V0=long A0 to string, using base A1 accepts: A0=value, A1=base, A2=mode (0-unsigned; 1-signed) ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: value SW S1,0014 (SP) ADDU S1,A1,R0 ;S1=A1: base LUI V0,8079 SW S2,0018 (SP) ADDIU S2,V0,4EB0 ;S2=80794EB0: source hexadecimal display string BGEZ S0,807856DC ;branch if positive SW RA,001C (SP) BEQ A2,R0,807856DC ;branch if unsigned value NOP JAL 80785500 ;draw character A0 using cur.display settings ADDIU A0,R0,002D ;A0=2D: '-' SUBU S0,R0,S0 ;S0=0-S0: S0->positive value //807856DC: divide by base DIVU S0,S1 BNE S1,R0,807856EC ;branch if no division by zero NOP BREAK 00001C00 //807856EC: re-enter to break entire value down by base MFLO A0 ;A0=value % base MFHI S0 ;S0=value / base BEQ A0,R0,80785704 ;if done with division, display ADDU A1,S1,R0 ;A1=S1: base JAL 807856A0 ;V0=long A0 to string, using base A1 ADDU A2,R0,R0 ;A2=0 mode=unsigned //80785704: display corresponding text value ADDU V0,S2,S0 ;V0=S2+value: p->string char to display LBU A0,0000 (V0) ;A0=char JAL 80785500 ;draw character A0 using cur.display settings NOP LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 8078572C SW A0,0000 (SP) SW A1,0004 (SP) SW A2,0008 (SP) SW A3,000C (SP) ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,R0,R0 SW RA,001C (SP) SW S2,0018 (SP) SW S0,0010 (SP) SW A0,0020 (SP) LBU V0,0000 (A0) BEQ V0,R0,8078592C ADDIU S0,SP,0024 LUI V0,8079 ADDIU S2,V0,4EC8 ;S2=80794EC8: pointer table //8078576C: LW A0,0020 (SP) LBU V1,0000 (A0) ADDIU V0,R0,0025 BNE V1,V0,80785908 ADDIU V0,A0,0001 SW V0,0020 (SP) LBU V0,0001 (A0) ADDIU V1,V0,FFDB SLTIU V0,V1,0054 BEQ V0,R0,80785900 SLL V0,V1,0x2 ADDU V0,V0,S2 LW V0,0000 (V0) JR V0 NOP //807857A8: A0 1 byte int ADDIU S0,S0,0004 LW A0,FFFC (S0) JAL 80785610 ;display byte A0 using cur.display settings ADDIU S1,S1,0001 J 80785914 NOP //807857C0: A0 2 byte int ADDIU S0,S0,0004 LW A0,FFFC (S0) JAL 80785640 ;display short A0 using cur.display settings ADDIU S1,S1,0001 J 80785914 NOP //807857D8: A0 4 byte int ADDIU S0,S0,0004 LW A0,FFFC (S0) JAL 80785670 ;display word A0 using cur.display settings ADDIU S1,S1,0001 J 80785914 NOP //807857F0: A0 1 byte text character ADDIU S0,S0,0004 LW A0,FFFC (S0) JAL 80785500 ;draw character A0 using cur.display settings ADDIU S1,S1,0001 J 80785914 NOP //80785808: A0 unsigned decimal value ADDIU S0,S0,0004 LW A0,FFFC (S0) J 807858D8 ADDIU A1,R0,000A //80785818: A0 unsigned octal value ADDIU S0,S0,0004 LW A0,FFFC (S0) J 807858D8 ADDIU A1,R0,0008 //80785828: A0 string ADDIU S0,S0,0004 LW A0,FFFC (S0) JAL 8078554C ;display string A0 using current display settings; 80-83 special ADDIU S1,S1,0001 J 80785914 NOP //80785840: display using format specifier LW V0,0020 (SP) ADDIU V1,V0,0001 SW V1,0020 (SP) LBU V1,0001 (V0) ADDIU V0,R0,006F ;V0=6F: 'o' BEQ V1,V0,807858BC ;branch if octal SLTI V0,V1,0070 ;V0<70: less than 'p' BEQ V0,R0,80785874 ;branch if other specifiers ADDIU V0,R0,0064 ;V0=64: 'd' BEQL V1,V0,80785894 ;branch if decimal int ADDIU S0,S0,0004 J 80785914 ADDIU S1,S1,0001 //80785874: more format specifiers ADDIU V0,R0,0075 ;V0=75: 'u' BEQ V1,V0,807858AC ;branch if unsigned int ADDIU V0,R0,0078 ;V0=78: 'x' BEQL V1,V0,807858D0 ;branch if hexadecimal ADDIU S0,S0,0004 J 80785914 ADDIU S1,S1,0001 //80785890: A0 signed decimal int ADDIU S0,S0,0004 LW A0,FFFC (S0) ADDIU A1,R0,000A ;A1=A: decimal JAL 807856A0 ;V0=long A0 to string, using base A1 ADDIU A2,R0,0001 ;A2=1 signed J 80785914 ADDIU S1,S1,0001 //807858AC: A0 unsigned decimal value ADDIU S0,S0,0004 LW A0,FFFC (S0) J 807858D8 ADDIU A1,R0,000A //807858BC: A0 octal value ADDIU S0,S0,0004 LW A0,FFFC (S0) J 807858D8 ADDIU A1,R0,0008 //807858CC: A0 hexadecimal value ADDIU S0,S0,0004 LW A0,FFFC (S0) ADDIU A1,R0,0010 ;A1=10: hexadecimal //807858D8: convert and display A0 JAL 807856A0 ;V0=long A0 to string, using base A1 ADDU A2,R0,R0 ;A2=unsigned J 80785914 ADDIU S1,S1,0001 //807858E8: LW V0,0020 (SP) LBU A0,0000 (V0) JAL 80785500 ;draw character A0 using cur.display settings ADDIU S1,S1,0001 J 80785914 NOP //80785900: J 80785930 ADDIU V0,R0,FFFF //80785908: LBU A0,0000 (A0) JAL 80785500 ;draw character A0 using cur.display settings NOP //80785914: LW V0,0020 (SP) ADDIU V1,V0,0001 SW V1,0020 (SP) LBU V0,0001 (V0) BNE V0,R0,8078576C NOP //8078592C: ADDU V0,S1,R0 LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80785948 ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 LUI V1,A07A ORI V1,V1,0400 LUI A0,A075 ORI A0,A0,A000 LUI V0,807A SW S1,0014 (SP) LUI S1,807A SW R0,B254 (V0) LUI V0,807A SW A0,B238 (V0) ADDU A0,R0,R0 SW RA,0018 (SP) JAL 807853F8 SW V1,B318 (S1) BNE S0,R0,80785A08 LUI T2,A440 LUI V1,0001 ORI V1,V1,300E LUI A0,03E5 ORI A0,A0,2239 LUI T0,0C15 ORI T0,T0,0C15 LUI A3,006C ORI A3,A3,02EC LUI A2,0025 ORI A2,A2,01FF LUI A1,000E LW V0,B318 (S1) ORI A1,A1,0204 SW V1,0000 (T2) SW V0,0004 (T2) ADDIU V0,R0,0140 SW V0,0008 (T2) ADDIU V0,R0,020D SW A0,0014 (T2) SW V0,0018 (T2) ADDIU V0,R0,0C15 SW V0,001C (T2) ADDIU V0,R0,0200 SW T0,0020 (T2) SW A3,0024 (T2) SW A2,0028 (T2) SW A1,002C (T2) J 80785A74 NOP LUI A3,0454 ORI A3,A3,1E3A LUI T1,0017 ORI T1,T1,0C69 LUI T0,0C6F ORI T0,T0,0C6D LUI A2,0080 ORI A2,A2,0300 LUI A1,005F ORI A1,A1,0239 LUI A0,0009 ORI A0,A0,026B LW V1,B318 (S1) ADDIU V0,R0,320E SW V0,0000 (T2) ADDIU V0,R0,0140 SW V1,0004 (T2) SW V0,0008 (T2) ADDIU V0,R0,0271 SW A3,0014 (T2) SW V0,0018 (T2) ADDIU V0,R0,0200 SW T1,001C (T2) SW T0,0020 (T2) SW A2,0024 (T2) SW A1,0028 (T2) SW A0,002C (T2) SW V0,0030 (T2) ADDIU V0,R0,0400 SW V0,0034 (T2) LUI A0,FFFE ORI A0,A0,FFFE LUI V1,807A ADDIU V0,R0,0010 SW V0,B32C (V1) LUI V0,807A SW R0,B330 (V0) LUI V0,807A SW A0,B250 (V0) LUI V0,807A LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) LUI V1,807A SW R0,B1E0 (V0) ADDIU V0,R0,0001 SW V0,B200 (V1) JR RA ADDIU SP,SP,0020 80785ACC MULT A1,A2 MFLO A1 BLEZ A1,80785B08 ADDU A2,R0,R0 LHU V0,0000 (A0) ADDIU A2,A2,0001 SRL V1,V0,0x8 ANDI V0,V0,00FF SLL V0,V0,0x8 OR V1,V1,V0 SLL V1,V1,0x1 SH V1,0000 (A0) SLT V0,A2,A1 BNE V0,R0,80785ADC ADDIU A0,A0,0002 JR RA NOP 80785B10 MULT A1,A2 MFLO V0 BLEZ V0,80785B48 ADDU T0,R0,R0 ADDIU T2,R0,0002 ADDU T1,V0,R0 ADDU V1,A0,R0 LH V0,0000 (V1) BEQL V0,R0,80785B38 SH T2,0000 (V1) ADDIU T0,T0,0001 SLT V0,T0,T1 BNE V0,R0,80785B2C ADDIU V1,V1,0002 MULT A1,A2 MFLO A1 BLEZ A1,80785B7C ADDU T0,R0,R0 SLL V0,A3,0x10 SRA V1,V0,0x10 LH V0,0000 (A0) BEQL V0,V1,80785B6C SH R0,0000 (A0) ADDIU T0,T0,0001 SLT V0,T0,A1 BNE V0,R0,80785B60 ADDIU A0,A0,0002 JR RA NOP 80785B84 LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDU A3,A0,R0 80785B94 BEQ A2,R0,80785BB0 ADDU V1,R0,R0 SB A1,0000 (A3) ADDIU V1,V1,0001 SLTU V0,V1,A2 BNE V0,R0,80785B9C ADDIU A3,A3,0001 JR RA ADDU V0,A0,R0 80785BB8 V0=8079A150: p->dyn.mem.table LUI V0,807A LW V0,A150 (V0) ;V0=8079A150: p->dyn.mem.table JR RA NOP 80785BC8 V0=A0+4: p->next entry accepts: A0=p->DM.entry LW V0,0004 (A0) JR RA NOP 80785BD4 V0=A0+8: p->data accepts: A0=p->DM.entry LW V0,0008 (A0) JR RA NOP 80785BE0 V0=p->final DM.entry accepts: A0=p->DM.entry ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: p->DM.entry SW RA,0014 (SP) //80785BF0: loop to find final entry JAL 80785BC8 ;V0=A0+4: p->next entry ADDU A0,S0,R0 ;A0=S0: p->DM.entry BEQ V0,R0,80785C10 ;return if NULL ADDU V0,S0,R0 ;V0=S0: p->final entry JAL 80785BC8 ;V0=A0+4: p->next entry ADDU A0,S0,R0 ;A0=S0: p->DM.entry J 80785BF0 ;loop until NULL entry found ADDU S0,V0,R0 ;S0=V0: next entry->cur.entry //80785C10: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785C20 V0=size of data from DM entry A0 to next DM entry accepts: A0=p->DM.entry LW V0,0004 (A0) ;V0=p->next entry ADDIU V0,V0,FFF0 ;V0-=10: p->end of A0's data JR RA SUBU V0,V0,A0 ;V0-=A0: size of entry+data 80785C30 set dynamic memory table from A0 to A1 accepts: A0=p->start, A1=p->end ADDIU SP,SP,FFE8 LUI V0,807A SW S0,0010 (SP) LUI S0,807A SW RA,0014 (SP) SW A0,A150 (V0) ;A0->8079A150: p->start of buffer JAL 80785BB8 ;V0=8079A150: p->dyn.mem.table SW A1,A154 (S0) ;A1->8079A154: p->end of buffer //80785C50: set header entry ADDIU A2,R0,0044 ;A2=44: 'D': dynamic ADDIU A1,R0,004D ;A1=4D: 'M': memory ADDIU V1,R0,0046 ;V1=46: 'F': free SB A2,0000 (V0) ;'D'->header[0] SB A1,0001 (V0) ;'M'->header[1] SB V1,0002 (V0) ;'F'->header[2] LW V1,A154 (S0) ;V1=8079A154: p->end of buffer ADDU A0,V0,R0 ;A0=V0: p->memory SW R0,0008 (V0) ;0->header[8]: data ADDIU V1,V1,FFF0 ;V1-=10: p->terminating entry header SW V1,0004 (V0) ;V1->header[4]: next entry ADDU V0,V1,R0 ;V0=V1: p->terminating entry header ADDIU V1,R0,0054 ;V1=54: 'T': terminator SB A2,0000 (V0) ;'D'->header[0] SB A1,0001 (V0) ;'M'->header[1] SB V1,0002 (V0) ;'T'->header[2]: set as terminating entry SW R0,0004 (V0) ;NULL->header[4]: p->next entry SW A0,0008 (V0) ;A0->header[8]: p->data LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785CA8 ADDIU SP,SP,FFE0 SW S2,0018 (SP) ADDIU S2,A0,000F ADDIU V0,R0,FFF0 AND S2,S2,V0 SW RA,001C (SP) SW S1,0014 (SP) JAL 80785BB8 ;V0=8079A150: p->dyn.mem.table SW S0,0010 (SP) ADDU S1,V0,R0 ADDIU S0,R0,0046 LBU V0,0002 (S1) BNE V0,S0,80785CF4 NOP JAL 80785C20 ;V0=size of data from DM entry A0 to next DM entry ADDU A0,S1,R0 SLT V0,V0,S2 BEQL V0,R0,80785D10 ADDIU S0,S1,0010 JAL 80785BC8 ;V0=A0+4: p->next entry ADDU A0,S1,R0 ADDU S1,V0,R0 BNE S1,R0,80785CD4 ADDIU V0,R0,FFFF J 80785D64 NOP ADDU A0,S0,R0 ADDIU V0,R0,0052 SB V0,0002 (S1) ADDIU V0,S2,0010 ADDU V0,S1,V0 LW A1,0004 (S1) ADDIU V1,R0,0044 SW V0,0004 (S1) SB V1,0000 (V0) ADDIU V1,R0,004D SB V1,0001 (V0) ADDIU V1,R0,0046 ADDU A2,S2,R0 SW S1,0008 (V0) SB V1,0002 (V0) SW A1,0004 (V0) ADDU S1,A1,R0 ADDU A1,R0,R0 JAL 80785B90 SW V0,0008 (S1) ADDU V0,S0,R0 LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80785D7C ADDU A2,A0,R0 ADDU A3,A2,R0 LBU V1,FFF0 (A3) ADDIU V0,R0,0044 BEQ V1,V0,80785D9C ADDIU A2,A2,FFF0 JR RA ADDIU V0,R0,FFFF LBU V1,0001 (A2) ADDIU V0,R0,004D BNE V1,V0,80785D94 ADDIU V0,R0,0052 LBU V1,0002 (A2) BNE V1,V0,80785DE4 ADDIU V0,R0,0046 SB V0,0002 (A2) LW A0,FFF4 (A3) ADDU V0,R0,R0 LW A1,0004 (A0) ADDIU V1,R0,007E SB V1,0000 (A0) SB V1,0001 (A0) SB V1,0002 (A0) SW A1,FFF4 (A3) JR RA SW A2,0008 (A1) JR RA ADDIU V0,R0,FFFF 80785DEC likely data ;LW A1,0000 (T0) 80785DF0 initialize SI ADDIU SP,SP,FFE8 LUI V0,807A ADDIU V0,V0,A160 ;V0=8079A160 ADDIU V0,V0,000F ADDIU V1,R0,FFF0 AND V0,V0,V1 ;V0=8079A160 rounded up to quadword LUI V1,FDFD ORI V1,V1,FDFD ;V1=FDFDFDFD SW S0,0010 (SP) LUI S0,807A SW RA,0014 (SP) SW V0,A1B0 (S0) ;8079A160->8079A1B0: set p->PIF buffer SW V1,0000 (V0) ;V1->PIF buffer+0: reset channels? LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer LUI V0,FDFD SW V0,0004 (A0) ;V0->PIF buffer+4: reset all six channels? ADDIU V0,R0,0001 JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) SW V0,003C (A0) ;1->PIF buffer+3C: execute commands LW A0,A1B0 (S0) JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,0004 ;A0=PIF buffer+4: second word LW A0,A1B0 (S0) JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,003C ;A0=PIF buffer+3C: final word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 807860D0 ;send SI write request to PIFram from A0 NOP ADDU V1,R0,R0 ;V1=0 init.count LUI A0,0001 ORI A0,A0,01CF ;A0=65999 //80785E6C: wait a socially acceptable period of time ADDIU V1,V1,0001 ;V1++ count++ SLT V0,A0,V1 BEQ V0,R0,80785E70 ;loop 66000 times ADDIU V1,V1,0001 ;V1++ count++ LUI V0,807A LW A0,A1B0 (V0) ;A0=8079A1B0: p->PIF buffer JAL 80786114 ;send SI read request to buffer A0 NOP ADDU V1,R0,R0 ;V1=0 init.count LUI A0,0001 ORI A0,A0,01CF ;A0=65999 //80785E98: wait a socially acceptable period of time ADDIU V1,V1,0001 ;V1++ count++ SLT V0,A0,V1 BEQL V0,R0,80785E9C ;loop 66000 times ADDIU V1,V1,0001 //80785EA8: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785EB8 V0=controller 1 buttons/stick state ADDIU SP,SP,FFE8 LUI V1,FF01 SW S0,0010 (SP) LUI S0,807A LW V0,A1B0 (S0) ;V0=8079A1B0: p->PIF buffer ORI V1,V1,0401 ;V1=FF010401 SW RA,0014 (SP) SW V1,0000 (V0) ;V1->PIF buffer+0: channel 1 read LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer LUI V0,FE00 SW V0,0008 (A0) ;V0->PIF buffer+8: end commands ADDIU V0,R0,0001 JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) SW V0,003C (A0) ;1->PIF buffer+3C: execute commands LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,0004 ;A0+=4: second word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,0008 ;A0+=8: third word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,003C ;A0+=3C: final word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 807860D0 ;send SI write request to PIFram from A0 NOP ADDU V1,R0,R0 ;V1=0 init.count LUI A0,0001 ORI A0,A0,01CF ;A0=65999 //80785F2C: loop for an acceptable period of time ADDIU V1,V1,0001 ;V1++ count++ SLT V0,A0,V1 BEQ V0,R0,80785F30 ;loop 66000 times ADDIU V1,V1,0001 ;V1++ count++ LUI V0,807A LW A0,A1B0 (V0) ;A0=8079A1B0: p->PIF buffer JAL 80786114 ;send SI read request to buffer A0 NOP ADDU V1,R0,R0 ;V1=0 init.count LUI A0,0001 ORI A0,A0,01CF ;A0=65999 //80785F58: loop for an aceptable period of time ADDIU V1,V1,0001 ;V1++ count++ SLT V0,A0,V1 BEQ V0,R0,80785F5C ;loop 66000 times ADDIU V1,V1,0001 ;V1++ count++ JAL 8078601C ;V0=controller 1 button/stick state NOP //80785F70: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785F80 read controller 1 from SI ADDIU SP,SP,FFE8 LUI V1,FF01 SW S0,0010 (SP) LUI S0,807A LW V0,A1B0 (S0) ;V0=8079A1B0: p->PIF buffer ORI V1,V1,0401 ;V1=FF010401 SW RA,0014 (SP) SW V1,0000 (V0) ;V1->PIF buffer+0: controller 1 read LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer LUI V0,FE00 SW V0,0008 (A0) ;V0->PIF buffer+8: end commands ADDIU V0,R0,0001 JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) SW V0,003C (A0) ;1->PIF buffer+3C: execute commands LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,0004 ;A0=PIF buffer+4: second word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,0008 ;A0=PIF buffer+8: third word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDIU A0,A0,003C ;A0=PIF buffer+3C: final word LW A0,A1B0 (S0) ;A0=8079A1B0: p->PIF buffer JAL 807860D0 ;send SI write request to PIFram from A0 NOP LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80785FF8 send SI read request to PIFram LUI V0,807A LW A0,A1B0 (V0) ;A0=8079A1B0: p->PIF buffer ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80786114 ;send SI read request to buffer A0 NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 8078601C V0=controller 1 button/stick state LUI V0,807A LW V0,A1B0 (V0) ;V0=p->PIF buffer LW V0,0004 (V0) ;V0=PIF buffer+4: controller 1 read data ANDI A0,V0,0080 BEQ A0,R0,80786040 ;branch if not negative ADDU A1,R0,R0 ANDI V0,V0,00FF ;V0&=FF: vert.stick J 80786050 SLTI A1,V0,00C0 ;A1=down (1) if vert.stick < -1/4 //80786040: check for up ANDI V0,V0,00FF ;V0&=FF: vert.stick SLTI V0,V0,0041 BEQL V0,R0,80786050 ;if vert.stick > 1/4, set up (2) ADDIU A1,R0,0002 //80786050: horizontal state -> flags LUI V0,807A LW V0,A1B0 (V0) LW V0,0004 (V0) ;V0=PIF buffer+4: controller 1 read data ANDI A0,V0,8000 BEQ A0,R0,80786080 ;branch if not negative ANDI V1,V0,FF00 ;V1=V0&FF00: horz.stick ORI V0,R0,BFFF SLT V0,V0,V1 BEQL V0,R0,80786090 ;if horz.stick < -1/4, set left (4) ADDIU A1,A1,0004 J 80786094 LUI V0,807A //80786080: check for right ANDI V0,V0,FF00 ;V0&=FF00: horz.stick SLTI V0,V0,4001 BEQL V0,R0,80786090 ;if horz.stick > 1/4, set right (8) ADDIU A1,A1,0008 //80786090: return LUI V0,807A LW V0,A1B0 (V0) ;V0=8079A1B0: p->PIF buffer LW V0,0004 (V0) ;V0=PIF buffer+4: controller 1 read data LUI V1,FFFF AND V0,V0,V1 ;V0&=V1: buttons JR RA ADDU V0,V0,A1 ;V0|=A1: buttons|stick 807860AC wait until SI ready LUI V0,A480 LW V0,0018 (V0) ;V0=A4800018: SI Status ANDI V0,V0,0003 BEQ V0,R0,807860C8 NOP //807860C0: loop until status clear BNE V0,R0,807860C0 NOP //807860C8: return JR RA NOP 807860D0 send SI write request to PIFram from A0 accepts: A0=p->PIF buffer ADDIU SP,SP,FFE8 SW S0,0010 (SP) SW RA,0014 (SP) JAL 807860AC ;wait until SI ready ADDU S0,A0,R0 ;S0=A0: p->PIF buffer LUI V1,1FFF ORI V1,V1,FFFF ;V1=1FFFFFFF: address mask LUI A0,1FC0 ORI A0,A0,07C0 ;A0=1FC007C0: p->PIF RAM LUI V0,A480 AND S0,S0,V1 ;S0&=V1: mask to hardware address SW S0,0000 (V0) ;S0->SI dram address SW A0,0010 (V0) ;A0->SI write address LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80786114 send SI read request to buffer A0 accepts: A0=p->PIF buffer ADDIU SP,SP,FFE8 SW S0,0010 (SP) SW RA,0014 (SP) JAL 807860AC ;wait until SI ready ADDU S0,A0,R0 ;S0=A0: p->PIF buffer LUI V1,1FFF ORI V1,V1,FFFF ;V1=1FFFFFFF: address mask LUI A0,1FC0 ORI A0,A0,07C0 ;A0=1FC007C0: p->PIF RAM LUI V0,A480 AND S0,S0,V1 ;S0&=V1: mask to hardware address SW S0,0000 (V0) ;S0->SI dram address SW A0,0004 (V0) ;A0->SI read address LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80786158 likely data ;SW V0,0000 (V1) ;BGTZ A2,8078613C 80786160 unconditional return JR RA NOP 80786168 ADDIU SP,SP,FFE0 SW RA,0018 (SP) SW S1,0014 (SP) BEQ A0,R0,80786194 SW S0,0010 (SP) LUI A0,807A LUI V1,807A LW V0,B208 (A0) LW V1,B1DC (V1) OR V0,V0,V1 SW V0,B208 (A0) LUI S0,807A LW V0,B1DC (S0) SRL V0,V0,0x1 BNE V0,R0,80786210 SW V0,B1DC (S0) LUI A1,807A LUI V0,807A LUI S1,807A ADDIU A0,S1,B208 LW V1,B240 (A1) LW V0,B314 (V0) LBU A0,0003 (A0) ADDU V0,V0,V1 SB A0,0000 (V0) LUI V0,807A LW V0,B31C (V0) ADDIU V1,V1,0001 SW V1,B240 (A1) SLT V1,V1,V0 BNE V1,R0,807861F8 LUI V0,8079 LUI A0,8079 JAL 80786160 ;unconditional return ADDIU A0,A0,5020 LUI V0,8079 LW V1,5994 (V0) ADDIU A0,R0,0080 SW R0,B208 (S1) SW A0,B1DC (S0) ADDIU V1,V1,0001 SW V1,5994 (V0) LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80786224 ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,R0,R0 SW RA,0014 (SP) JAL 80786168 ADDU A0,R0,R0 ADDIU S0,S0,0001 SLTI V0,S0,0007 BNE V0,R0,80786234 NOP LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 8078625C LUI A2,807A LW V0,B1D4 (A2) SRL V0,V0,0x1 BNE V0,R0,807862A0 SW V0,B1D4 (A2) LUI A0,807A LUI V0,807A LW V1,B1FC (A0) LW V0,B23C (V0) ADDU V0,V0,V1 ADDIU V1,V1,0001 LBU A1,0000 (V0) ADDIU V0,R0,0080 SW V0,B1D4 (A2) LUI V0,807A SW V1,B1FC (A0) SW A1,B204 (V0) LUI V0,807A LW V0,B204 (V0) LW V1,B1D4 (A2) AND V0,V0,V1 JR RA SLTU V0,R0,V0 807862B8 ADDIU V1,R0,1001 LUI V0,807A LW V0,B310 (V0) ADDIU A1,R0,1000 ADDIU A0,V0,4004 SW A1,0000 (A0) ADDIU V1,V1,0001 SLTI V0,V1,1101 BNE V0,R0,807862CC ADDIU A0,A0,0004 ADDIU A0,R0,1000 LUI V0,807A LW V0,B220 (V0) ADDIU V1,R0,0FFF ADDIU V0,V0,3FFC SW A0,0000 (V0) ADDIU V1,V1,FFFF BGEZ V1,807862F4 ADDIU V0,V0,FFFC JR RA NOP 8078630C ADDU T4,A0,R0 ADDIU A2,R0,0001 ADDIU T7,R0,1000 LUI V0,807A ADDU T6,V0,R0 LUI V0,807A LUI T5,807A LUI V1,807A LW V0,B310 (V0) LW V1,B248 (V1) ADDU T3,V0,R0 LUI V0,807A ADDU T0,V1,R0 ADDU A3,T0,T4 LW V0,B220 (V0) LBU A1,0000 (A3) SLL A0,T4,0x2 SW R0,B20C (T6) ADDU T8,A0,V0 LUI V0,807A LW V0,B30C (V0) ADDIU T2,A1,1001 ADDU T1,V0,R0 ADDU V1,A0,T1 ADDU V0,T7,R0 ADDU A0,A0,T3 SW V0,0000 (V1) SW V0,0000 (A0) BLTZ A2,807863A0 SLL V0,T2,0x2 ADDU V0,V0,T3 LW V1,0000 (V0) BNEL V1,T7,807863B4 ADDU T2,V1,R0 SW T4,0000 (V0) JR RA SW T2,0000 (T8) ADDU V0,V0,T1 LW V1,0000 (V0) BEQL V1,T7,807864D4 SW T4,0000 (V0) ADDU T2,V1,R0 ADDIU A0,R0,0001 ADDU V1,A3,A0 ADDU V0,T2,A0 ADDU V0,T0,V0 LBU V1,0000 (V1) LBU V0,0000 (V0) SUBU A2,V1,V0 BNE A2,R0,807863EC SLTI V0,A0,0003 ADDIU A0,A0,0001 SLTI V0,A0,003C BNE V0,R0,807863BC ADDU V1,A3,A0 SLTI V0,A0,0003 BNE V0,R0,8078637C NOP LW V1,B20C (T6) SLT V0,V1,A0 BEQ V0,R0,80786420 SUBU V0,T4,T2 ANDI V0,V0,0FFF SW V0,B328 (T5) SLTI V0,A0,003C BEQ V0,R0,80786444 SW A0,B20C (T6) J 8078637C NOP BNE A0,V1,8078637C SUBU V1,T4,T2 LW V0,B328 (T5) ANDI V1,V1,0FFF SLT V0,V1,V0 BNEL V0,R0,8078637C SW V1,B328 (T5) J 8078637C NOP LUI V0,807A SLL V1,T4,0x2 SLL A0,T2,0x2 LW A3,B220 (V0) LUI V0,807A LW T3,B30C (V0) ADDU T1,A0,A3 ADDU V0,V1,A3 LW A1,0000 (T1) ADDU T0,A0,T3 SW A1,0000 (V0) LUI V0,807A LW A2,B310 (V0) ADDU V0,V1,T3 LW A1,0000 (T0) ADDU A0,A0,A2 SW A1,0000 (V0) LW V0,0000 (A0) ADDU V1,V1,A2 SW V0,0000 (V1) LW V0,0000 (T0) SLL V0,V0,0x2 ADDU V0,V0,A3 SW T4,0000 (V0) LW V0,0000 (A0) SLL V0,V0,0x2 ADDU V0,V0,A3 SW T4,0000 (V0) LW V0,0000 (T1) SLL A0,V0,0x2 ADDU V1,A0,A2 LW V0,0000 (V1) BNE V0,T2,807864EC ADDU V0,A0,T3 J 807864F0 SW T4,0000 (V1) LUI V0,807A LW V1,B220 (V0) SLL V0,T4,0x2 ADDU V0,V0,V1 JR RA SW T2,0000 (V0) SW T4,0000 (V0) LUI V0,807A LW V1,B220 (V0) SLL V0,T2,0x2 ADDU V0,V0,V1 ADDIU V1,R0,1000 JR RA SW V1,0000 (V0) 8078650C ADDU T2,A0,R0 LUI V0,807A LW V0,B220 (V0) SLL A0,T2,0x2 ADDU V0,A0,V0 LW V0,0000 (V0) ADDIU A2,R0,1000 BEQ V0,A2,807866B4 LUI V0,807A LW A1,B310 (V0) ADDU V0,A0,A1 LW V1,0000 (V0) BNE V1,A2,80786558 LUI V0,807A LW V0,B30C (V0) ADDU V0,A0,V0 LW T1,0000 (V0) J 8078664C LUI V0,807A LW V0,B30C (V0) ADDU V0,A0,V0 LW V0,0000 (V0) BEQ V0,A2,80786648 ADDU T1,V1,R0 ADDU T1,V0,R0 SLL V0,T1,0x2 ADDU V0,V0,A1 LW V0,0000 (V0) BEQ V0,A2,80786610 ADDU V1,A1,R0 ADDIU A0,R0,1000 SLL V0,T1,0x2 ADDU V0,V0,V1 LW T1,0000 (V0) SLL A1,T1,0x2 ADDU V0,A1,V1 LW V0,0000 (V0) BNE V0,A0,8078658C SLL V0,T1,0x2 LUI V0,807A LUI A0,807A LUI V1,807A LW A2,B220 (V0) LW T0,B30C (V1) LW V1,B310 (A0) ADDU A3,A1,A2 ADDU A1,A1,T0 LW V0,0000 (A3) LW A0,0000 (A1) SLL V0,V0,0x2 ADDU V0,V0,V1 SW A0,0000 (V0) LW V0,0000 (A1) LW V1,0000 (A3) SLL V0,V0,0x2 ADDU V0,V0,A2 SW V1,0000 (V0) SLL V0,T2,0x2 ADDU V0,V0,T0 LW V1,0000 (V0) SW V1,0000 (A1) LW V0,0000 (V0) SLL V0,V0,0x2 ADDU V0,V0,A2 SW T1,0000 (V0) LUI V0,807A SLL V1,T1,0x2 LW A1,B310 (V0) SLL V0,T2,0x2 ADDU V0,V0,A1 LW A0,0000 (V0) ADDU V1,V1,A1 SW A0,0000 (V1) LUI V1,807A LW V0,0000 (V0) LW V1,B220 (V1) SLL V0,V0,0x2 ADDU V0,V0,V1 SW T1,0000 (V0) LUI V0,807A SLL V1,T1,0x2 LW A1,B220 (V0) SLL V0,T2,0x2 ADDU V0,V0,A1 LW A0,0000 (V0) ADDU V1,V1,A1 SW A0,0000 (V1) LUI V1,807A LW V0,0000 (V0) LW V1,B310 (V1) SLL A0,V0,0x2 ADDU V1,A0,V1 LW V0,0000 (V1) BNE V0,T2,80786690 LUI V0,807A J 8078669C SW T1,0000 (V1) LW V0,B30C (V0) ADDU V0,A0,V0 SW T1,0000 (V0) LUI V0,807A LW V1,B220 (V0) SLL V0,T2,0x2 ADDU V0,V0,V1 ADDIU V1,R0,1000 SW V1,0000 (V0) JR RA NOP 807866BC ADDIU A1,R0,013A ADDIU T2,R0,0001 LUI V0,807A LW T1,B1E8 (V0) LUI V0,807A LW T0,B1E4 (V0) LUI V0,807A LUI V1,807A LW V0,B214 (V0) LW A3,B24C (V1) ADDU A2,V0,R0 SW R0,04E8 (A2) ADDIU A0,A1,FFFF SLL V0,A0,0x2 ADDU V0,V0,T1 SLL V1,A1,0x2 SW A1,0000 (V0) ADDU V0,V1,T0 SW A0,0000 (V0) ADDU V0,V1,A3 ADDU V1,V1,A2 SW T2,0000 (V0) LW V0,0000 (V1) ADDU A1,A0,R0 ADDIU V0,V0,0001 BGTZ A1,807866EC SW V0,FFFC (V1) LUI V0,807A LW V0,B24C (V0) ADDIU A1,R0,1000 SW R0,0000 (V0) LUI V0,807A LW V0,B21C (V0) ADDIU A2,R0,2710 ADDIU A0,V0,4000 SW R0,4000 (V0) ADDIU V1,A1,00C8 DIV A2,V1 BNE V1,R0,80786760 NOP BREAK 00001C00 ADDIU AT,R0,FFFF BNE V1,AT,80786778 LUI AT,8000 BNE A2,AT,80786778 NOP BREAK 00001800 MFLO V1 LW V0,0000 (A0) ADDIU A1,A1,FFFF ADDU V0,V0,V1 SW V0,FFFC (A0) BGTZ A1,8078674C ADDIU A0,A0,FFFC JR RA NOP 8078679C LUI V0,807A LW V1,B214 (V0) LW V0,0000 (V1) SLTIU V0,V0,7FFF BNE V0,R0,80786800 ADDU A3,A0,R0 ADDU A0,R0,R0 ADDIU A2,R0,013A LUI V0,807A LW V0,B24C (V0) ADDIU A1,V1,04E8 ADDIU V1,V0,04E8 SW A0,0000 (A1) ADDIU A1,A1,FFFC LW V0,0000 (V1) ADDIU A2,A2,FFFF ADDIU V0,V0,0001 SRL V0,V0,0x1 ADDU A0,A0,V0 SW V0,0000 (V1) BGTZ A2,807867CC ADDIU V1,V1,FFFC LUI V0,807A LW V0,B214 (V0) SW A0,0000 (V0) ADDU A2,A3,R0 LUI V0,807A LW V1,B24C (V0) SLL V0,A2,0x2 ADDU A0,V0,V1 LW V1,0000 (A0) LW V0,FFFC (A0) BNE V1,V0,8078683C SLT V0,A2,A3 ADDIU A0,A0,FFFC LW V1,0000 (A0) LW V0,FFFC (A0) BEQ V1,V0,80786824 ADDIU A2,A2,FFFF SLT V0,A2,A3 BEQ V0,R0,80786888 LUI V0,807A SLL A0,A2,0x2 LW V1,B1E4 (V0) SLL V0,A3,0x2 ADDU A0,A0,V1 ADDU V0,V0,V1 LW A1,0000 (V0) LW V1,0000 (A0) SW A1,0000 (A0) SW V1,0000 (V0) LUI V0,807A SLL V1,V1,0x2 LW V0,B1E8 (V0) SLL A1,A1,0x2 ADDU V1,V1,V0 ADDU A1,A1,V0 SW A3,0000 (V1) SW A2,0000 (A1) LUI V0,807A LW V0,B24C (V0) SLL V1,A2,0x2 ADDU V1,V1,V0 LW V0,0000 (V1) ADDIU A2,A2,FFFF ADDIU V0,V0,0001 BLTZ A2,807868D4 SW V0,0000 (V1) LUI V0,807A LW V1,B214 (V0) SLL V0,A2,0x2 ADDU V1,V0,V1 LW V0,0000 (V1) ADDIU A2,A2,FFFF ADDIU V0,V0,0001 SW V0,0000 (V1) BGEZ A2,807868BC ADDIU V1,V1,FFFC JR RA NOP 807868DC ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 SW RA,0018 (SP) JAL 80786168 SW S0,0010 (SP) LUI V1,8079 LW V0,59A8 (V1) BLEZ V0,8078691C ADDU S0,V1,R0 JAL 80786168 SLTIU A0,S1,0001 LW V0,59A8 (S0) ADDIU V0,V0,FFFF BGTZ V0,80786904 SW V0,59A8 (S0) LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80786930 ADDIU SP,SP,FFC8 LUI V0,807A SLL A0,A0,0x2 LUI T0,8079 LW V0,B1E8 (V0) LW A2,599C (T0) LUI A3,8079 SW RA,0034 (SP) SW S8,0030 (SP) SW S7,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) ADDU A0,A0,V0 LUI V0,807A LW S6,0000 (A0) LW A1,B214 (V0) LW A0,59A0 (A3) SLL V1,S6,0x2 ADDU V1,V1,A1 LW V0,FFFC (V1) SUBU A0,A0,A2 MULT A0,V0 MFLO T1 LW V0,0000 (A1) NOP DIVU T1,V0 BNE V0,R0,807869B8 NOP BREAK 00001C00 MFLO V0 LW V1,0000 (V1) NOP MULT A0,V1 MFLO V1 ADDU V0,A2,V0 SW V0,59A0 (A3) LW V0,0000 (A1) DIVU V1,V0 BNE V0,R0,807869E8 NOP BREAK 00001C00 MFLO V0 ADDU S1,A3,R0 LUI S2,0001 ADDU S0,T0,R0 ORI S8,R0,FFFF ADDIU S7,R0,7FFF ADDU S5,S2,R0 ORI S5,S5,8000 LUI S4,8079 ADDIU S3,R0,8000 ADDU A2,A2,V0 SW A2,599C (S0) LW A0,59A0 (S1) SLTU V0,S2,A0 BNE V0,R0,80786A38 NOP JAL 807868DC ADDU A0,R0,R0 J 80786A94 NOP LW V1,599C (S0) SLTU V0,S8,V1 BEQ V0,R0,80786A6C SLTU V0,S7,V1 JAL 807868DC ADDIU A0,R0,0001 LW V0,599C (S0) LW V1,59A0 (S1) SUBU V0,V0,S2 SUBU V1,V1,S2 SW V0,599C (S0) J 80786A94 SW V1,59A0 (S1) BEQ V0,R0,80786AB0 SLTU V0,S5,A0 BNE V0,R0,80786AB0 ADDU V0,V1,S3 LW V1,59A8 (S4) SW V0,599C (S0) ADDU V0,A0,S3 SW V0,59A0 (S1) ADDIU V1,V1,0001 SW V1,59A8 (S4) LW V0,599C (S0) LW V1,59A0 (S1) SLL V0,V0,0x1 SLL V1,V1,0x1 SW V0,599C (S0) J 80786A18 SW V1,59A0 (S1) JAL 8078679C ADDU A0,S6,R0 LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80786AE8 ADDIU SP,SP,FFC8 LUI T0,8079 LUI T1,8079 LUI V0,807A LW A2,B21C (V0) LW A1,59A0 (T0) LW A3,599C (T1) SLL A0,A0,0x2 SW RA,0030 (SP) SW S7,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) SW S0,0010 (SP) ADDU A0,A0,A2 LW V0,0000 (A0) SUBU A1,A1,A3 MULT A1,V0 MFLO V1 LW V0,0000 (A2) NOP DIVU V1,V0 BNE V0,R0,80786B58 NOP BREAK 00001C00 MFLO V0 LW V1,0004 (A0) NOP MULT A1,V1 MFLO V1 ADDU V0,A3,V0 SW V0,59A0 (T0) LW V0,0000 (A2) DIVU V1,V0 BNE V0,R0,80786B88 NOP BREAK 00001C00 MFLO V0 ADDU S1,T0,R0 LUI S2,0001 ADDU S0,T1,R0 ORI S7,R0,FFFF ADDIU S6,R0,7FFF ADDU S5,S2,R0 ORI S5,S5,8000 LUI S4,8079 ADDIU S3,R0,8000 ADDU A3,A3,V0 SW A3,599C (S0) LW A0,59A0 (S1) SLTU V0,S2,A0 BNE V0,R0,80786BD8 NOP JAL 807868DC ADDU A0,R0,R0 J 80786C34 NOP LW V1,599C (S0) SLTU V0,S7,V1 BEQ V0,R0,80786C0C SLTU V0,S6,V1 JAL 807868DC ADDIU A0,R0,0001 LW V0,599C (S0) LW V1,59A0 (S1) SUBU V0,V0,S2 SUBU V1,V1,S2 SW V0,599C (S0) J 80786C34 SW V1,59A0 (S1) BEQ V0,R0,80786C50 SLTU V0,S5,A0 BNE V0,R0,80786C50 ADDU V0,V1,S3 LW V1,59A8 (S4) SW V0,599C (S0) ADDU V0,A0,S3 SW V0,59A0 (S1) ADDIU V1,V1,0001 SW V1,59A8 (S4) LW V0,599C (S0) LW V1,59A0 (S1) SLL V0,V0,0x1 SLL V1,V1,0x1 SW V0,599C (S0) J 80786BB8 SW V1,59A0 (S1) LW RA,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80786C7C LUI V1,8079 LW V0,59A8 (V1) ADDIU SP,SP,FFE8 SW RA,0010 (SP) ADDIU V0,V0,0001 SW V0,59A8 (V1) LUI V0,8079 LW V1,599C (V0) ADDIU V0,R0,7FFF SLTU V0,V0,V1 BNE V0,R0,80786CB0 ADDIU A0,R0,0001 ADDU A0,R0,R0 JAL 807868DC NOP JAL 80786224 NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80786CCC ADDIU A1,R0,0001 ADDIU A2,R0,013A LUI V0,807A LW A3,B214 (V0) ADDU V0,A1,A2 SRL V1,V0,0x1F ADDU V0,V0,V1 SRA V1,V0,0x1 SLL V0,V1,0x2 ADDU V0,V0,A3 LW V0,0000 (V0) SLTU V0,A0,V0 BEQL V0,R0,80786D08 ADDU A2,V1,R0 ADDIU A1,V1,0001 SLT V0,A1,A2 BNE V0,R0,80786CE0 ADDU V0,A1,A2 JR RA ADDU V0,A1,R0 80786D1C ADDIU A1,R0,0001 ADDIU A2,R0,1000 LUI V0,807A LW A3,B21C (V0) ADDU V0,A1,A2 SRL V1,V0,0x1F ADDU V0,V0,V1 SRA V1,V0,0x1 SLL V0,V1,0x2 ADDU V0,V0,A3 LW V0,0000 (V0) SLTU V0,A0,V0 BEQL V0,R0,80786D58 ADDU A2,V1,R0 ADDIU A1,V1,0001 SLT V0,A1,A2 BNE V0,R0,80786D30 ADDU V0,A1,A2 JR RA ADDIU V0,A1,FFFF 80786D6C ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,R0,R0 SW S1,0014 (SP) LUI S1,8079 SW RA,0018 (SP) JAL 8078625C ADDIU S0,S0,0001 LW V1,59A4 (S1) SLL V1,V1,0x1 ADDU V1,V1,V0 SLTI V0,S0,0011 BNE V0,R0,80786D84 SW V1,59A4 (S1) LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80786DB8 ADDIU SP,SP,FFD0 SW S2,0018 (SP) LUI S2,8079 SW S4,0020 (SP) LUI S4,8079 SW S3,001C (SP) LUI S3,807A LW A0,599C (S2) LW V0,59A4 (S4) LW V1,B214 (S3) SW RA,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SUBU V0,V0,A0 LW V1,0000 (V1) ADDIU V0,V0,0001 MULT V0,V1 LUI S1,8079 LW S0,59A0 (S1) MFLO V1 SUBU S0,S0,A0 ADDIU A0,V1,FFFF DIVU A0,S0 BNE S0,R0,80786E28 NOP BREAK 00001C00 MFLO A0 JAL 80786CCC ORI S6,R0,FFFF ADDU S5,V0,R0 LW A1,B214 (S3) SLL V1,S5,0x2 ADDU V1,V1,A1 LW V0,FFFC (V1) MULT S0,V0 MFLO A3 LW V0,0000 (A1) NOP DIVU A3,V0 BNE V0,R0,80786E68 NOP BREAK 00001C00 MFLO V0 LW V1,0000 (V1) NOP MULT S0,V1 LW A0,599C (S2) MFLO V1 ADDU V0,A0,V0 SW V0,59A0 (S1) LW V0,0000 (A1) DIVU V1,V0 BNE V0,R0,80786E9C NOP BREAK 00001C00 MFLO V0 LUI S3,FFFF ADDIU S0,R0,8000 ADDU A0,A0,V0 SW A0,599C (S2) LW V1,599C (S2) SLTU V0,S6,V1 BEQ V0,R0,80786EE0 ADDU V0,V1,S3 SW V0,599C (S2) LW V0,59A4 (S4) LW V1,59A0 (S1) ADDU V0,V0,S3 ADDU V1,V1,S3 SW V0,59A4 (S4) J 80786F34 SW V1,59A0 (S1) ADDIU V0,R0,7FFF SLTU V0,V0,V1 BEQ V0,R0,80786F20 LUI V0,0001 LW A0,59A0 (S1) ORI V0,V0,8000 SLTU V0,V0,A0 BNE V0,R0,80786F20 ADDU V0,V1,S0 LW V1,59A4 (S4) SW V0,599C (S2) ADDU V0,A0,S0 SW V0,59A0 (S1) ADDU V1,V1,S0 J 80786F34 SW V1,59A4 (S4) LW V1,59A0 (S1) LUI V0,0001 SLTU V0,V0,V1 BNE V0,R0,80786F64 ADDU A0,S5,R0 LW V0,599C (S2) LW V1,59A0 (S1) SLL V0,V0,0x1 SLL V1,V1,0x1 SW V0,599C (S2) JAL 8078625C SW V1,59A0 (S1) LW V1,59A4 (S4) SLL V1,V1,0x1 ADDU V1,V1,V0 J 80786EB0 SW V1,59A4 (S4) LUI V0,807A LW V1,B1E4 (V0) SLL V0,A0,0x2 ADDU V0,V0,V1 LW S0,0000 (V0) JAL 8078679C NOP LW RA,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) ADDU V0,S0,R0 LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 80786FAC ADDIU SP,SP,FFD0 SW S2,0018 (SP) LUI S2,8079 SW S4,0020 (SP) LUI S4,8079 SW S3,001C (SP) LUI S3,807A LW A0,599C (S2) LW V0,59A4 (S4) LW V1,B21C (S3) SW RA,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S1,0014 (SP) SW S0,0010 (SP) SUBU V0,V0,A0 LW V1,0000 (V1) ADDIU V0,V0,0001 MULT V0,V1 LUI S1,8079 LW S0,59A0 (S1) MFLO V1 SUBU S0,S0,A0 ADDIU A0,V1,FFFF DIVU A0,S0 BNE S0,R0,8078701C NOP BREAK 00001C00 MFLO A0 JAL 80786D1C ORI S6,R0,FFFF ADDU S5,V0,R0 LW A1,B21C (S3) SLL V1,S5,0x2 ADDU V1,V1,A1 LW V0,0000 (V1) MULT S0,V0 MFLO A3 LW V0,0000 (A1) NOP DIVU A3,V0 BNE V0,R0,8078705C NOP BREAK 00001C00 MFLO V0 LW V1,0004 (V1) NOP MULT S0,V1 LW A0,599C (S2) MFLO V1 ADDU V0,A0,V0 SW V0,59A0 (S1) LW V0,0000 (A1) DIVU V1,V0 BNE V0,R0,80787090 NOP BREAK 00001C00 MFLO V0 LUI S3,FFFF ADDIU S0,R0,8000 ADDU A0,A0,V0 SW A0,599C (S2) LW V1,599C (S2) SLTU V0,S6,V1 BEQ V0,R0,807870D4 ADDU V0,V1,S3 SW V0,599C (S2) LW V0,59A4 (S4) LW V1,59A0 (S1) ADDU V0,V0,S3 ADDU V1,V1,S3 SW V0,59A4 (S4) J 80787128 SW V1,59A0 (S1) ADDIU V0,R0,7FFF SLTU V0,V0,V1 BEQ V0,R0,80787114 LUI V0,0001 LW A0,59A0 (S1) ORI V0,V0,8000 SLTU V0,V0,A0 BNE V0,R0,80787114 ADDU V0,V1,S0 LW V1,59A4 (S4) SW V0,599C (S2) ADDU V0,A0,S0 SW V0,59A0 (S1) ADDU V1,V1,S0 J 80787128 SW V1,59A4 (S4) LW V1,59A0 (S1) LUI V0,0001 SLTU V0,V0,V1 BNE V0,R0,80787158 ADDU V0,S5,R0 LW V0,599C (S2) LW V1,59A0 (S1) SLL V0,V0,0x1 SLL V1,V1,0x1 SW V0,599C (S2) JAL 8078625C SW V1,59A0 (S1) LW V1,59A4 (S4) SLL V1,V1,0x1 ADDU V1,V1,V0 J 807870A4 SW V1,59A4 (S4) LW RA,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 80787180 ADDIU SP,SP,FFC8 SW S1,0014 (SP) ADDU S1,A0,R0 SW S2,0018 (SP) ADDU S2,A1,R0 SW S0,0010 (SP) ADDU S0,A2,R0 ADDIU A0,R0,103B SW RA,0034 (SP) SW S8,0030 (SP) SW S7,002C (SP) SW S6,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) JAL 80785CA8 SW S3,001C (SP) ADDIU A0,R0,4004 LUI V1,807A JAL 80785CA8 SW V0,B248 (V1) ADDIU A0,R0,4404 LUI V1,807A JAL 80785CA8 SW V0,B30C (V1) ADDIU A0,R0,4004 LUI V1,807A JAL 80785CA8 SW V0,B310 (V1) ADDIU A0,R0,04E8 LUI V1,807A JAL 80785CA8 SW V0,B220 (V1) ADDIU A0,R0,04EC LUI V1,807A JAL 80785CA8 SW V0,B1E8 (V1) ADDIU A0,R0,04EC LUI V1,807A JAL 80785CA8 SW V0,B1E4 (V1) ADDIU A0,R0,04EC LUI V1,807A JAL 80785CA8 SW V0,B24C (V1) ADDIU A0,R0,4004 LUI V1,807A JAL 80785CA8 SW V0,B214 (V1) ADDU S3,R0,R0 LUI V1,807A ADDU A2,V1,R0 LUI V1,807A ADDU T0,V1,R0 LUI V1,807A ADDU A3,V1,R0 LUI V1,807A LUI A0,8079 SW V0,B21C (V1) LUI V0,8079 SW R0,5994 (V0) LUI V0,8079 SW R0,5998 (V0) LUI V0,807A LUI V1,807A SW R0,B208 (V0) ADDIU V0,R0,0080 SW V0,B1DC (V1) LUI V0,807A SW R0,B204 (V0) LUI V0,807A SW R0,B1D4 (V0) LUI V0,8079 LUI V1,8079 SW R0,599C (V0) LUI V0,0002 SW V0,59A0 (V1) LUI V0,8079 SW R0,59A4 (V0) LUI V0,807A SW S2,B23C (V0) LUI V0,807A SW S0,B31C (V0) LUI V0,807A SW R0,5990 (A0) SW S1,B314 (T0) SW S0,B244 (A3) SW S0,5990 (A0) SW R0,B1FC (V0) SW R0,B240 (A2) SLL A1,S3,0x3 ADDIU S3,S3,0001 LW A0,B240 (A2) LW V1,B314 (T0) LW V0,B244 (A3) ADDU V1,V1,A0 ADDIU A0,A0,0001 SRAV V0,V0,A1 SB V0,0000 (V1) SLTI V0,S3,0004 BNE V0,R0,807872E4 SW A0,B240 (A2) LUI V0,8079 LUI A1,8079 LW V1,5994 (V0) LW A0,5990 (A1) ADDIU V1,V1,0004 BNE A0,R0,80787338 SW V1,5994 (V0) J 807875C8 ADDU V0,R0,R0 JAL 807866BC SW R0,5990 (A1) JAL 807862B8 ADDU S2,R0,R0 ADDIU S1,R0,0FC4 ADDU S3,S2,R0 LUI A0,807A ADDIU V1,R0,0020 LW V0,B248 (A0) ADDU V0,V0,S3 ADDIU S3,S3,0001 SB V1,0000 (V0) SLT V0,S3,S1 BNE V0,R0,80787358 ADDU S4,R0,R0 LUI A2,807A LUI T1,807A LUI T0,807A LUI A3,807A LW A1,B1FC (A2) LW V0,B244 (T1) SLT V0,A1,V0 BEQ V0,R0,807873C4 ADDU A0,S1,S4 ADDIU S4,S4,0001 LW V0,B23C (T0) LW V1,B248 (A3) ADDU V0,V0,A1 LBU S0,0000 (V0) ADDIU V0,A1,0001 ADDU V1,V1,A0 SW V0,B1FC (A2) SLTI V0,S4,003C BNE V0,R0,80787384 SB S0,0000 (V1) LUI V0,8079 SW S4,5990 (V0) ADDIU S3,R0,0001 JAL 8078630C SUBU A0,S1,S3 ADDIU S3,S3,0001 SLTI V0,S3,003D BNE V0,R0,807873D0 NOP JAL 8078630C ADDU A0,S1,R0 LUI S6,807A LUI S7,807A LUI S8,807A LW V0,B20C (S6) SLT V0,S4,V0 BNEL V0,R0,8078740C SW S4,B20C (S6) LW A0,B20C (S6) SLTI V0,A0,0003 BEQ V0,R0,8078743C ADDIU V0,R0,0001 LW V1,B248 (S7) SW V0,B20C (S6) ADDU V1,V1,S1 LBU A0,0000 (V1) JAL 80786930 NOP J 80787454 NOP JAL 80786930 ADDIU A0,A0,00FD LUI V0,807A LW A0,B328 (V0) JAL 80786AE8 ADDIU A0,A0,FFFF LW S5,B20C (S6) BLEZ S5,80787510 ADDU S3,R0,R0 LUI T2,807A LW V1,B1FC (S8) LW V0,B244 (T2) SLT V0,V1,V0 BEQ V0,R0,80787510 LUI T2,807A LW V0,B23C (T2) ADDU A0,S2,R0 ADDU V0,V0,V1 LBU S0,0000 (V0) ADDIU V0,V1,0001 JAL 8078650C SW V0,B1FC (S8) LW V0,B248 (S7) ADDU V0,V0,S2 SB S0,0000 (V0) SLTI V0,S2,003B BEQ V0,R0,807874BC ADDIU V0,S2,0001 LW V0,B248 (S7) ADDU V0,S2,V0 SB S0,1000 (V0) ADDIU V0,S2,0001 ANDI S2,V0,0FFF ADDIU V0,S1,0001 ANDI S1,V0,0FFF JAL 8078630C ADDU A0,S1,R0 ADDIU S3,S3,0001 SLT V0,S3,S5 BNE V0,R0,80787464 LUI T2,807A J 80787514 ADDU V0,S3,R0 JAL 8078650C ADDU A0,S2,R0 ADDIU V0,S2,0001 ANDI S2,V0,0FFF ADDIU V0,S1,0001 ADDIU S4,S4,FFFF BEQ S4,R0,80787510 ANDI S1,V0,0FFF JAL 8078630C ADDU A0,S1,R0 ADDU V0,S3,R0 SLT V0,V0,S5 BNE V0,R0,807874E8 ADDIU S3,S3,0001 BGTZ S4,807873FC NOP JAL 80786C7C NOP LUI V0,807A LW A0,B21C (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B214 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B24C (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B1E4 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B1E8 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B220 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B310 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B30C (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B248 (V0) JAL 80785D7C NOP LUI V0,807A LW V0,B240 (V0) LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 807875F8 ADDIU SP,SP,FFD0 SW S1,0014 (SP) ADDU S1,A0,R0 SW S0,0010 (SP) ADDU S0,A1,R0 ADDIU A0,R0,103B SW RA,0028 (SP) SW S5,0024 (SP) SW S4,0020 (SP) SW S3,001C (SP) JAL 80785CA8 SW S2,0018 (SP) ADDIU A0,R0,4004 LUI V1,807A JAL 80785CA8 SW V0,B248 (V1) ADDIU A0,R0,4404 LUI V1,807A JAL 80785CA8 SW V0,B30C (V1) ADDIU A0,R0,4004 LUI V1,807A JAL 80785CA8 SW V0,B310 (V1) ADDIU A0,R0,04E8 LUI V1,807A JAL 80785CA8 SW V0,B220 (V1) ADDIU A0,R0,04EC LUI V1,807A JAL 80785CA8 SW V0,B1E8 (V1) ADDIU A0,R0,04EC LUI V1,807A JAL 80785CA8 SW V0,B1E4 (V1) ADDIU A0,R0,04EC LUI V1,807A JAL 80785CA8 SW V0,B24C (V1) ADDIU A0,R0,4004 LUI V1,807A JAL 80785CA8 SW V0,B214 (V1) ADDU A2,R0,R0 LUI V1,8079 ADDU A3,V1,R0 LUI V1,807A ADDU T0,V1,R0 LUI V1,807A SW V0,B21C (V1) LUI V0,8079 SW R0,5994 (V0) LUI V0,8079 SW R0,5998 (V0) LUI V0,807A LUI V1,807A SW R0,B208 (V0) ADDIU V0,R0,0080 SW V0,B1DC (V1) LUI V0,807A SW R0,B204 (V0) LUI V0,807A SW R0,B1D4 (V0) LUI V0,8079 LUI V1,8079 SW R0,599C (V0) LUI V0,0002 SW V0,59A0 (V1) LUI V0,8079 SW R0,59A4 (V0) LUI V0,807A SW S1,B314 (V0) LUI V0,807A SW S0,B23C (V0) LUI V0,807A SW R0,5990 (A3) SW R0,B1FC (T0) SW R0,B240 (V0) SW R0,5990 (A3) SLL A1,A2,0x3 LW V1,B1FC (T0) ADDIU A2,A2,0001 ADDU V0,S0,V1 LBU A0,0000 (V0) LW V0,5990 (A3) ADDIU V1,V1,0001 SW V1,B1FC (T0) SLLV A0,A0,A1 OR V0,V0,A0 SW V0,5990 (A3) SLTI V0,A2,0004 BNEL V0,R0,8078773C SLL A1,A2,0x3 LUI V0,8079 LW V1,5990 (V0) LUI V0,807A BNE V1,R0,8078778C SW V1,B31C (V0) J 80787948 ADDU V0,R0,R0 JAL 80786D6C NOP JAL 807866BC NOP ADDU A2,R0,R0 LUI A0,807A ADDIU V1,R0,0020 LW V0,B248 (A0) ADDU V0,V0,A2 ADDIU A2,A2,0001 SB V1,0000 (V0) SLTI V0,A2,0FC4 BNE V0,R0,807877A8 ADDIU S1,R0,0FC4 LUI V0,8079 LW V0,5990 (V0) BEQ V0,R0,807878B0 ADDU S2,R0,R0 LUI S3,807A LUI S5,807A LUI S4,807A JAL 80786DB8 NOP ADDU S0,V0,R0 SLTI V0,S0,0100 BEQ V0,R0,8078782C NOP LW V0,B240 (S3) LW V1,B314 (S5) ADDIU S2,S2,0001 ADDU V1,V1,V0 SB S0,0000 (V1) LW V1,B248 (S4) ADDIU V0,V0,0001 SW V0,B240 (S3) ADDU V1,V1,S1 ADDIU S1,S1,0001 ANDI S1,S1,0FFF J 8078789C SB S0,0000 (V1) JAL 80786FAC NOP SUBU V0,S1,V0 ADDIU V0,V0,FFFF ANDI A2,V0,0FFF ADDIU A3,S0,FF03 BLEZ A3,8078789C ADDU A1,R0,R0 ADDIU S2,S2,0001 ADDU V0,A2,A1 ADDIU A1,A1,0001 ANDI V0,V0,0FFF LW V1,B248 (S4) LW A0,B240 (S3) ADDU V1,V1,V0 LW V0,B314 (S5) LBU S0,0000 (V1) ADDU V0,V0,A0 SB S0,0000 (V0) LW V0,B248 (S4) ADDIU A0,A0,0001 SW A0,B240 (S3) ADDU V0,V0,S1 ADDIU S1,S1,0001 SB S0,0000 (V0) SLT V0,A1,A3 BNE V0,R0,8078784C ANDI S1,S1,0FFF LUI V0,8079 LW V0,5990 (V0) SLTU V0,S2,V0 BNE V0,R0,807877E0 NOP LUI V0,807A LW A0,B21C (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B214 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B24C (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B1E4 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B1E8 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B220 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B310 (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B30C (V0) JAL 80785D7C NOP LUI V0,807A LW A0,B248 (V0) JAL 80785D7C NOP LUI V0,807A LW V0,B240 (V0) LW RA,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 8078796C ADDIU SP,SP,FFE8 SW RA,0010 (SP) ADDU A3,A1,R0 LUI V0,8079 ADDIU A1,V0,59B0 LBU V1,0000 (A3) BEQ V1,R0,807879E0 ADDIU A2,R0,0001 ADDU V0,A2,A1 LBU V0,0003 (V0) BNE V1,V0,807879A8 ADDU V0,A3,A2 LBU V1,0000 (V0) BNE V1,R0,8078798C ADDIU A2,A2,0001 BEQ V1,R0,807879E0 NOP LBU V1,0000 (A1) LBU V0,0001 (A1) SLL A2,V1,0x18 SLL V0,V0,0x10 OR A2,A2,V0 LBU V1,0002 (A1) LBU V0,0003 (A1) SLL V1,V1,0x8 OR A2,A2,V1 OR A2,A2,V0 J 80787980 ADDU A1,A1,A2 JAL 807875F8 ADDIU A1,A1,0010 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 807879F4 LB T8,CDE0 (V1) LB T8,BEE0 (V1) LB T8,BEE0 (V1) ADDIU SP,SP,FFEC SW RA,0010 (SP) LUI T0,BEC0 ORI T0,T0,1000 LUI T1,8000 ORI T1,T1,0400 LUI T2,0003 ORI T2,T2,F000 LW T3,0000 (T0) ADDIU T0,T0,0004 SW T3,0000 (T1) ADDIU T2,T2,FFFC BNE T2,R0,80787A20 ADDIU T1,T1,0004 JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP JAL 800004A0 NOP LW RA,0010 (SP) ADDIU SP,SP,0014 JR RA NOP 80787A58 invalidate cache in first 6Kb and writeback in first 3Kb ADDIU SP,SP,FFE4 SW T0,0010 (SP) SW T1,0014 (SP) SW AT,0018 (SP) LUI T0,8000 ADDIU T1,T0,3000 ;T1=80003000 ADDIU T1,T1,FFF0 ;T1-=10 //80787A74: don't allow writeback in first 3Kb CACHE 0000 (T0), D, Index Writeback Invalidate SLTU AT,T0,T1 BNE AT,R0,80787A74 ;loop from 80000000 to 80003000 ADDIU T0,T0,0010 ;T0+=10 LUI T0,8000 ADDIU T1,T0,6000 ;T1=80006000 ADDIU T1,T1,FFE0 ;T1-=10 //80787A90: invalidate first 6Kb CACHE 0000 (T0), I, Index Invalidate SLTU AT,T0,T1 BNE AT,R0,80787A90 ;loop from 80000000 to 80006000 ADDIU T0,T0,0020 ;T0+=20 LW T0,0010 (SP) LW T1,0014 (SP) LW AT,0018 (SP) JR RA ADDIU SP,SP,001C 80787AB4 cache A0 (Hit Writeback Invalidate) CACHE 0000 (A0), D, Hit Writeback Invalidate JR RA NOP 80787AC0 JR A0 JR A0 NOP 80787AC8 JAL A0 ADDIU SP,SP,FFEC SW RA,0010 (SP) JALR RA,A0 NOP LW RA,0010 (SP) ADDIU SP,SP,0014 JR RA NOP 80787AE8 V0=COP0 Status MFC0 V0,Status/DPC-Clock JR RA NOP 80787AF4 A0->COP0 Status MTC0 A0,Status/DPC-Clock JR RA NOP 80787B00 V0=COP0 Cause MFC0 V0,Cause/DPC-Buf.Busy JR RA NOP 80787B0C V0=COP0 ExpectPC MFC0 V0,ExpectPC/DPC-Pipe Busy JR RA NOP 80787B18 ADDIU SP,SP,FFE4 SW RA,0010 (SP) SW T0,0014 (SP) SW T1,0018 (SP) LUI T0,8078 ADDIU T0,T0,7B44 LUI T1,4085 OR T1,T1,A0 SW T1,0000 (T0) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP MTC0 A1,Index/SP-Memory Address LW T1,0018 (SP) LW T0,0014 (SP) LW RA,0010 (SP) ADDIU SP,SP,001C JR RA NOP 80787B60 ADDIU SP,SP,FFE4 SW RA,0010 (SP) SW T0,0014 (SP) SW T1,0018 (SP) LUI T0,8078 ADDIU T0,T0,7B8C LUI T1,4002 OR T1,T1,A0 SW T1,0000 (T0) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP MFC0 V0,Index/SP-Memory Address LW T1,0018 (SP) LW T0,0014 (SP) LW RA,0010 (SP) ADDIU SP,SP,001C JR RA NOP 80787BA8 8078BF18 p->??? 80787BAC 8078BF74 p->??? 80787BB0 A0->SP+0, A1->SP+4, A2->SP+8, A3->SP+C SW A0,0000 (SP) SW A1,0004 (SP) SW A2,0008 (SP) SW A3,000C (SP) JR RA NOP 80787BC8 unconditional return JR RA NOP 80787BD0 unconditional return JR RA NOP 80787BD8 8078CE30 p->??? 80787BDC 8078CE30 p->??? 80787BE0 ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80787C64 ;save A0 to cur.hardware + 600 ADDIU A0,R0,0200 ;A0=0200 JAL 80787C24 ;fill LCD controller with byte A0 ADDU A0,R0,R0 ;A0=NULL JAL 80780CD0 ;display A0 to LCD screen ADDU A0,R0,R0 ;A0=0 init? LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80787C0C loop 190 times ADDIU V0,R0,00BF ;V0=191 ADDIU V0,V0,FFFF ;V0-- //80787C14: loop for count BGEZ V0,80787C14 ;loop 190 times ADDIU V0,V0,FFFF ;V0-- JR RA NOP 80787C24 fill LCD controller with byte A0 accepts: A0=value ADDIU SP,SP,FFE8 ANDI A0,A0,00FF ;A0->byte SLL V0,A0,0x18 SLL V1,A0,0x10 OR V0,V0,V1 SLL V1,A0,0x8 OR V0,V0,V1 OR V0,V0,A0 SW RA,0010 (SP) LUI AT,BE60 SW V0,FFFC (AT) ;V0->BE5FFFFC: [A0.A0.A0.A0]->LCD controller JAL 80787C0C ;loop 190 times NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80787C64 save A0 to cur.hardware + 600 ADDIU SP,SP,FFE8 SLL A1,A0,0x10 ADDIU A0,R0,0600 ;A0=600 SW RA,0010 (SP) JAL 80787FBC ;save A1 to cur.hardware + offset A0 SRA A1,A1,0x10 ;A1->short LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80787C88 V0=value at cur.hardware ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80787F80 ;V0=value at cur.hardware + offset A0 ADDU A0,R0,R0 ;A0=0 no offset LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80787CA4 V0=readwritenibble(A0) accepts: A0=nibble ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 SW RA,0018 (SP) JAL 80787AE8 ;V0=COP0 Status SW S1,0014 (SP) ADDU S1,V0,R0 ADDIU A0,R0,FFFE JAL 80787AF4 ;A0->COP0 Status AND A0,S1,A0 JAL 80787C88 ;V0=value at cur.hardware NOP ANDI V0,V0,0010 BEQ V0,R0,80787CCC NOP JAL 80787C88 ;V0=value at cur.hardware NOP ANDI V0,V0,0010 BEQ V0,R0,80787CE0 NOP JAL 80787C88 ;V0=value at cur.hardware NOP ANDI A0,S0,000F ORI A0,A0,0010 JAL 80787C24 ;fill LCD controller with byte A0 ANDI S0,V0,000F JAL 80787C88 ;V0=value at cur.hardware NOP ANDI V0,V0,0010 BNE V0,R0,80787D0C NOP JAL 80787C88 ;V0=value at cur.hardware NOP ANDI V0,V0,0010 BNE V0,R0,80787D20 NOP JAL 80787C24 ;fill LCD controller with byte A0 ADDU A0,R0,R0 JAL 80787AF4 ;A0->COP0 Status ADDU A0,S1,R0 ADDU V0,S0,R0 LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80787D5C V0=readwritebyte(A0) accepts: A0=byte ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 SW RA,0014 (SP) JAL 80787CA4 ;V0=readwritenibble(A0) SRA A0,S0,0x4 ADDU A0,S0,R0 JAL 80787CA4 ;V0=readwritenibble(A0) ADDU S0,V0,R0 SLL S0,S0,0x4 OR V0,S0,V0 LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80787D98 V0=readwriteshort(A0) accepts: A0=short ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 SW RA,0014 (SP) JAL 80787D5C ;V0=readwritebyte(A0) SRA A0,S0,0x8 ADDU A0,S0,R0 JAL 80787D5C ;V0=readwritebyte(A0) ADDU S0,V0,R0 SLL S0,S0,0x8 OR V0,S0,V0 LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80787DD4 V0=readwriteword(A0) accepts: A0=word ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 SW RA,0014 (SP) JAL 80787D98 ;V0=readwriteshort(A0) SRA A0,S0,0x10 ADDU A0,S0,R0 JAL 80787D98 ;V0=readwriteshort(A0) ADDU S0,V0,R0 SLL S0,S0,0x10 OR V0,S0,V0 LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80787E10 ADDIU SP,SP,FFD8 SW S0,0010 (SP) ADDU S0,R0,R0 SW S3,001C (SP) ADDIU S3,R0,000F SW S2,0018 (SP) ADDIU S2,R0,000E SW S1,0014 (SP) ADDIU S1,R0,000A SW RA,0020 (SP) JAL 80787CA4 ;V0=readwritenibble(A0) ADDU A0,R0,R0 BNE V0,S3,80787E78 NOP JAL 80787CA4 ;V0=readwritenibble(A0) ADDIU A0,R0,000F BNE V0,R0,80787E78 NOP JAL 80787CA4 ;V0=readwritenibble(A0) ADDIU A0,R0,000A BNE V0,S2,80787E78 NOP JAL 80787CA4 ;V0=readwritenibble(A0) ADDIU A0,R0,000E BEQL V0,S1,80787E78 ADDIU S0,R0,0001 BEQ S0,R0,80787E38 NOP LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80787E9C ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 SW RA,0014 (SP) LBU V0,0000 (S0) BEQ V0,R0,80787ED0 NOP LBU A0,0000 (S0) JAL 80787D5C ;V0=readwritebyte(A0) ADDIU S0,S0,0001 LBU V0,0000 (S0) BNE V0,R0,80787EB8 NOP LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80787EE0 cycle GS activity display, returning V0=value on port or 0 ADDIU SP,SP,FFE8 LUI A1,807A LW V0,9CF4 (A1)) ;V0=80799CF4: timer.LCD ADDIU V1,R0,0033 ;V1=0x33: 51 SW RA,0014 (SP) SW S0,0010 (SP) ADDIU V0,V0,0001 ;V0++ timer++ BNE V0,V1,80787F48 ;retain display for 50 cycles SW V0,9CF4 (A1) ;V0->80799CF4: update timer.LCD //80787F04: cycle B,LL,M,LR LUI S0,807A LBU A0,9CF0 (S0) ;A0=80799CF0: cur.LCD JAL 80780CD0 ;display A0 to LCD screen SW R0,9CF4 (A1) ;0->80799CF4: timer.LCD LBU V0,9CF0 (S0) ;V0=80799CF0: cur.LCD ADDIU V1,R0,0064 ;V1=64: 'd' ADDIU V0,V0,0001 ;V0++ advance LCD display SB V0,9CF0 (S0) ;V0->80799CF0: cur.LCD //80787F24: if 'd' (UL), set to 'g' (LR) ANDI V0,V0,00FF ;V0->byte BNE V0,V1,80787F34 ;if cur.LCD 'd', set to 'g' ADDIU V0,R0,0067 ;V0=67: 'g' SB V0,9CF0 (S0) ;V0->80799CF0: cur.LCD //80787F34: cycle back to bottom LBU V1,9CF0 (S0) ;V1=80799CF0: cur.LCD ADDIU V0,R0,0068 ;V0=68: 'h' BNE V1,V0,80787F48 ;if cur.LCD 'h', reset to 'a' ADDIU V0,R0,0061 ;V0=61: 'a' SB V0,9CF0 (S0) ;V0->80799CF0: cur.LCD //80787F48: test if port initialized JAL 80787C88 ;V0=value at cur.hardware NOP ANDI V0,V0,0010 BEQ V0,R0,80787F68 ;branch if 10 not set on port ADDU V0,R0,R0 ;V0=0 not initialized JAL 80787C88 ;V0=value at cur.hardware NOP ANDI V0,V0,000F ;V0->nibble //80787F68: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80787F78 8078CF00 p->??? 80787F7C 8078CE74 p->??? 80787F80 V0=value at cur.hardware + offset A0 accepts: A0=offset ADDIU SP,SP,FFE8 LUI V0,807A LUI V1,807A SW S0,0010 (SP) LW S0,9D04 (V0) ;S0=80799D04: hardware bank LW V0,9D00 (V1) ;V0=80799D00: hardware address range SW RA,0014 (SP) OR S0,S0,V0 ;S0|=range JAL 80788050 ;wait for PI Status clear OR S0,S0,A0 ;S0|=offset: hardware address LW V0,0000 (S0) ;V0=value at hardware address LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80787FBC save A1 to cur.hardware + offset A0 accepts: A0=offset, A1=value ADDIU SP,SP,FFE8 ANDI A1,A1,FFFF ;A1->short SLL V1,A1,0x10 ;V1=A1*&1000 LUI V0,807A LUI A2,807A LW V0,9D04 (V0) ;V0=80799D04: hardware bank LW A2,9D00 (A2) ;A2=80799D00: hardware address range OR V1,V1,A1 ;V1|=A1: [A1A1.A1A1] SW RA,0010 (SP) OR V0,V0,A2 ;V0|=A2: range|bank OR V0,V0,A0 ;V0|=A0: range|bank|offset: hardware address SW V1,0000 (V0) ;V1->hardware JAL 80788050 ;wait for PI Status clear NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80788000 sets new hardware address A0; root of address saved to cur. hardware address+400 accepts: A0=p->hardware range ADDIU SP,SP,FFE8 LUI V0,0F00 SW S0,0010 (SP) AND S0,A0,V0 ;S0=A0 & 0F000000: address range LUI V0,1000 OR S0,S0,V0 ;S0|=10000000: physical address range ADDIU A0,R0,0400 ;A0=400 SW RA,0014 (SP) JAL 80787FBC ;save A1 to cur.hardware + offset A0 SRL A1,S0,0x18 ;A1=(byte) address range LUI V1,807A LUI V0,B000 LW RA,0014 (SP) OR S0,S0,V0 ;S0|=B0000000: virtual address range SW S0,9D04 (V1) ;S0->80799D04: hardware address range LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80788048 8078CDE0 p->??? 8078804C 8078CE88 p->??? 80788050 wait for PI Status clear LUI V1,A460 //80788054: LW V0,0010 (V1) ;V0=A4600010: PI Status ANDI V0,V0,0003 BNE V0,R0,80788054 ;loop until status clear NOP JR RA NOP 8078806C write A2 bytes from hardware A1 to A0 accepts: A0=p->rdram address, A1=p->hardware address, A2=size ADDIU SP,SP,FFD8 SW S1,0014 (SP) ADDU S1,A0,R0 ;S1=A0: p->target SW S3,001C (SP) ADDU S3,A1,R0 ;S3=A1: p->hardware address SW S2,0018 (SP) ADDU S2,A2,R0 ;S2=A2: size SW RA,0020 (SP) JAL 80788050 ;wait for PI Status clear SW S0,0010 (SP) BLEZ S2,807880B4 ;if no size, don't cache ADDU S0,R0,R0 ;S0=0 init.count //8078809C: cache [A2] bytes at [A0] JAL 80787AB4 ;cache A0 (Hit Writeback Invalidate) ADDU A0,S1,S0 ;A0=S1+S0: base+offset ADDIU S0,S0,0004 ;S0+=4 SLT V0,S0,S2 BNE V0,R0,8078809C ;loop for size NOP //807880B4: set PI registers LUI V1,1FFF ORI V1,V1,FFFF ;V1=1FFFFFFF: address mask ADDIU S0,R0,03E7 ;S0=999 count LUI A0,A460 AND V0,S1,V1 ;V0=S1&mask: absolute rdram address AND V1,S3,V1 ;V1&=S3: absolute hardware address SW V0,0000 (A0) ;V0->PI+0: rdram address ADDIU V0,S2,FFFF ;V0=S2-1: size SW V1,0004 (A0) ;V1->PI+4: hardware address SW V0,000C (A0) ;V0->PI+C: write size ADDIU S0,S0,FFFF ;S0-- //807880E0: bide your time BGEZ S0,807880E0 ;loop 1000 times ADDIU S0,S0,FFFF ;S0-- JAL 80788050 ;wait for PI Status clear NOP LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 8078810C-8078C910 pointer table: font row constructors 8078C910 "........" LW S0,0000 (A0) ADDI A0,A0,0004 JR S0 ADDI A1,A1,0280 8078C920 "....+..." LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078C934 "...+...." LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078C948 "...++..." LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078C960 "..+....." LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078C974 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078C98C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078C9A4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078C9C0 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) JR S0 ADDI A1,A1,0280 8078C9D4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078C9EC LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078CA04 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CA20 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078CA38 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CA54 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078CA70 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CA90 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) JR S0 ADDI A1,A1,0280 8078CAA4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CACC LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078CAF4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CB10 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078CB28 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CB44 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078CB60 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CB80 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) JR S0 ADDI A1,A1,0280 8078CB98 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CBB4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078CBD0 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CBF0 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078CC0C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CC2C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078CC4C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078CC70 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078CC84 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078CC9C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078CCB4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078CCD0 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078CCE8 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S1,0000 (SP) ADDI SP,SP,0004 LW S0,0000 (SP) ADDI SP,SP,0004 JR RA NOP 8078D828 "........" LW S0,0000 (A0) ADDI A0,A0,0004 JR S0 ADDI A1,A1,0280 8078D838 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D84C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078D860 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D878 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078D88C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D8A4 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078D8B8 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D8D0 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) JR S0 ADDI A1,A1,0280 8078D8E4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D8FC LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078D914 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D930 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078D948 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D964 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078D97C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D998 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) JR S0 ADDI A1,A1,0280 8078D9AC LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D9C4 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078D9DC LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078D9F8 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078DA10 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078DA2C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078DA44 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078DA60 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) JR S0 ADDI A1,A1,0280 8078DA74 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078DA8C LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) JR S0 ADDI A1,A1,0280 8078DAA4 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078DAC0 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078DAD8 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078DAF4 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) JR S0 ADDI A1,A1,0280 8078DB0C LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SH S1,0008 (A1) JR S0 ADDI A1,A1,0280 8078DB28 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DB3C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DB54 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DB6C LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DB88 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DBA0 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DBBC LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DBD4 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 8078DBF0 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SH S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SH S1,000A (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SW S1,0008 (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SW S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0006 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SW S1,0008 (A1) SH S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SW S1,0004 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0000 (A1) SH S1,0004 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000A (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SH S1,000A (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SH S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SW S1,0004 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SW S1,0004 (A1) SW S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SW S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SW S1,0008 (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) SW S1,000C (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0006 (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,0008 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0002 (A1) SH S1,0006 (A1) SH S1,000A (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,000A (A1) SH S1,000C (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0004 (A1) SH S1,0008 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 LW S0,0000 (A0) ADDI A0,A0,0004 SH S1,0000 (A1) SH S1,000E (A1) JR S0 ADDI A1,A1,0280 8078ED30 display character A2 in colour A3 at {A0,A1} accepts: A0=xpos, A1=ypos, A2=char, A3=colour ADDI SP,SP,FFFC SW S0,0000 (SP) ADDI SP,SP,FFFC SW S1,0000 (SP) ADDI SP,SP,FFFC SW A3,0000 (SP) ;SP+0=A3: colour ADDIU S0,R0,0280 ;S0=280: width of screen*2 (2 bytes per pixel) MULT A1,S0 LUI A1,807A LW A1,B238 (A1) ;A1=8079B238: p->screen buffer LUI S0,DFFF ORI S0,S0,FFFF ;S0=DFFFFFFF AND A1,A1,S0 ;A1&=mask: unset 20000000 in address ADD A0,A0,A0 ;A0*=2: two bytes per pixel ADD A1,A1,A0 ;A1+=A0: address + x MFLO S0 ;S0=ypos*screen.width: row offset ADD A1,A1,S0 ;A1+=S0: address + x + y ADDI A2,A2,FFE0 ;A2-=20: ' ' first displayable character ADD A3,A2,A2 ADD A3,A3,A3 SLL A2,A2,0x5 ADD A2,A2,A3 ADD A2,A2,A2 ;A2=char * 48 LUI S0,8078 ORI S0,S0,8134 ;S0=80788134: shadow images ANDI A0,A0,0002 BEQ A0,R0,8078EDA8 ;branch if even (shadow offset) NOP LUI S0,8078 ORI S0,S0,8110 ;S0=80788110: normal images //8078EDA8: retrieve handlers for rows ADD A0,S0,A2 ;A0=S0+A2: address + offset LW S1,0000 (SP) ;S1=[A3 f/ caller]: colour ADDI SP,SP,0004 LW S0,0000 (A0) ;S0=address+charoffset: p->handler ADDI A0,A0,0004 ;A0+=4: next handler JR S0 ;execute handler NOP 8078EDC4 LUI A3,0080 ;A3=00800000 LUI V1,807A LW A0,8878 (V1) ;A0=80798878: ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 ;S1=A0: LUI V0,AFFF ORI V0,V0,FFFF ;V0=AFFFFFFF SLTU V0,V0,S1 ;TRUE if a hardware address SW RA,001C (SP) SW S2,0018 (SP) BNE V0,R0,8078EE04 ;branch if a hardware address SW S0,0010 (SP) LBU V0,0000 (S1) ;V0=S1: value at address J 8078EE68 NOP //8078EE04: LUI A0,807A LW V0,9D10 (A0) ;V0=80799D10: BNE V0,R0,8078EE2C LUI S2,807A LUI V0,807A ADDIU V0,V0,A1C0 ;V0=8079A1C0 ADDIU V0,V0,000F ;V0+=F ADDIU V1,R0,FFF0 AND V0,V0,V1 ;V0=8079A1C0 rounded up to quadword, which is exactly the same as before thank you very much SW V0,9D10 (A0) ;8079A1C0->80799D10 //8078EE2C: LW V0,9D14 (S2) ;V0=80799D14: LW S0,9D10 (A0) ;S0=80799D10: SUBU V1,S1,V0 SLTIU V0,V1,1000 BNE V0,R0,8078EE64 ADDU V0,S0,V1 ADDU A0,S0,R0 ;A0=S0: p->target ADDU A1,S1,R0 ;A1=S1: p->hardware JAL 8078806C ;write A2 bytes from hardware A1 to A0 ADDIU A2,R0,1000 ;A2=1000 bytes SW S1,9D14 (S2) LBU V0,0000 (S0) J 8078EE68 NOP //8078EE64: LBU V0,0000 (V0) //8078EE68: return LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 8078EE80 redirect to 8078554C ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 8078554C ;display string A0 using current display settings; 80-83 special NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 8078EE9C ADDIU SP,SP,FFE8 LUI V0,807A ADDIU A0,V0,B258 BEQ A0,R0,8078EEB8 SW RA,0010 (SP) JAL 80785D7C NOP LUI V0,807A LW A0,9DF8 (V0) BEQ A0,R0,8078EED4 LUI V0,807A JAL 80785D7C NOP LUI V0,807A LW A0,9DFC (V0) BEQ A0,R0,8078EEE8 NOP JAL 80785D7C NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 8078EEF4 unconditional return JR RA NOP 8078EEFC unconditional return JR RA NOP 8078EF04 unconditional return JR RA NOP 8078EF0C unconditional return JR RA NOP 8078EF14 unconditional return JR RA NOP 8078EF1C ADDIU SP,SP,FFE8 SW S0,0010 (SP) LUI S0,807A LUI A1,8079 LW A0,9DF8 (S0) ;A0=80799DF8: SW RA,0014 (SP) JAL 8078796C ADDIU A1,A1,5030 ;A1=80795030 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LW A0,9DF8 (S0) JAL 80785ACC ADDU A3,R0,R0 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LW A0,9DF8 (S0) JAL 80785B10 ADDIU A3,R0,002A LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 8078EF74 redirect to 8078EF1C ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 8078EF1C NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 8078EF90 ADDIU SP,SP,FFA0 SW S6,0050 (SP) ADDU S6,A0,R0 SW S7,0054 (SP) ADDU S7,A1,R0 ADDIU A1,R0,0030 SW S8,0058 (SP) SLL S8,A2,0x3 SW S4,0048 (SP) LUI S4,807A LW A0,9DF8 (S4) ADDIU A2,R0,0041 SW A3,006C (SP) LUI A3,0080 SW S3,0044 (SP) LUI S3,807A SW S2,0040 (SP) LW S2,0070 (SP) LW V0,B218 (S3) ORI A3,A3,8080 SW S0,0038 (SP) ADDIU S0,R0,0015 SW S5,004C (SP) ADDIU S5,R0,000B SW RA,005C (SP) SW S1,003C (SP) SW S6,0010 (SP) SW S7,0014 (SP) SW S0,0018 (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW R0,002C (SP) SW S0,0030 (SP) SW S5,0034 (SP) ADDU S1,S2,S5 SW S1,001C (SP) JAL 807932F8 SW V0,0024 (SP) ADDU V0,S6,S0 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LW A0,9DF8 (S4) LW V1,B218 (S3) ORI A3,A3,8080 SW V0,0010 (SP) ADDIU V0,R0,0008 SW S7,0014 (SP) SW S8,0018 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW S0,0028 (SP) SW R0,002C (SP) SW V0,0030 (SP) SW S5,0034 (SP) JAL 807932F8 SW V1,0024 (SP) ADDU V0,S6,S8 ADDU V0,V0,S0 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 ORI A3,A3,8080 LW A0,9DF8 (S4) LW T0,B218 (S3) ADDIU V1,R0,0013 SW V0,0010 (SP) ADDIU V0,R0,001D SW S7,0014 (SP) SW V1,0018 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW V0,0028 (SP) SW R0,002C (SP) SW V1,0030 (SP) SW S5,0034 (SP) JAL 807932F8 SW T0,0024 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb SRA S2,S2,0x1 ADDU A0,S6,S0 ADDIU S2,S2,0002 ADDU A1,S7,S2 LW A3,006C (SP) ADDU A2,S8,R0 JAL 8078F904 ;print string A3 centered to A2 in colour SP+10 at {A0,A1} SW R0,0010 (SP) LW RA,005C (SP) LW S8,0058 (SP) LW S7,0054 (SP) LW S6,0050 (SP) LW S5,004C (SP) LW S4,0048 (SP) LW S3,0044 (SP) LW S2,0040 (SP) LW S1,003C (SP) LW S0,0038 (SP) JR RA ADDIU SP,SP,0060 8078F11C ADDIU SP,SP,FFA0 SW S4,0048 (SP) LUI S4,8079 LW V0,5970 (S4) SW RA,005C (SP) SW S8,0058 (SP) SW S7,0054 (SP) SW S6,0050 (SP) SW S5,004C (SP) SW S3,0044 (SP) SW S2,0040 (SP) SW S1,003C (SP) SW S0,0038 (SP) SW A0,0060 (SP) SW A1,0064 (SP) SW A2,0068 (SP) BEQ V0,R0,8078F264 SW A3,006C (SP) ADDU S5,A0,R0 ADDU S6,A1,R0 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI S2,807A ORI A3,A3,8080 SW S5,0010 (SP) ADDIU S5,S5,0015 ADDIU S0,R0,0015 LUI S3,807A LW A0,9DF8 (S2) LW V0,B218 (S3) ADDIU S1,R0,0010 SW S6,0014 (SP) SW S0,0018 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW R0,002C (SP) SW S0,0030 (SP) SW S1,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LW A0,9DF8 (S2) LW T1,0068 (SP) LW V1,B218 (S3) ORI A3,A3,8080 SW S5,0010 (SP) SW S6,0014 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW S0,0028 (SP) SW R0,002C (SP) SW S1,0034 (SP) SLL V0,T1,0x3 ADDU S5,S5,V0 SW V0,0018 (SP) ADDIU V0,R0,0008 SW V0,0030 (SP) JAL 807932F8 SW V1,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 ORI A3,A3,8080 ADDIU V1,R0,0013 LW A0,9DF8 (S2) LW T0,B218 (S3) ADDIU V0,R0,001D SW S5,0010 (SP) SW S6,0014 (SP) SW V1,0018 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW V0,0028 (SP) SW R0,002C (SP) SW V1,0030 (SP) SW S1,0034 (SP) JAL 807932F8 SW T0,0024 (SP) LW T1,0064 (SP) ADDIU S6,T1,0010 LW T1,006C (SP) LW S5,0060 (SP) BLEZ T1,8078F41C ADDIU A1,R0,0030 BLEZ T1,8078F41C ADDU S0,R0,R0 LUI S8,807A ADDIU S7,R0,0015 ADDIU S2,R0,000E LW T1,0068 (SP) LUI S4,807A SLL S3,T1,0x3 LW T1,0074 (SP) BNE T1,S0,8078F2BC ADDIU S1,R0,0010 LW T1,0078 (SP) BEQ T1,R0,8078F2D8 ADDIU S1,R0,001E J 8078F2D8 ADDIU S1,R0,002C LUI T1,8079 LW V0,5974 (T1) BEQ V0,S0,8078F2D8 LUI T1,8079 LW V0,5970 (T1) BEQ V0,R0,8078F31C NOP ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LW A0,9DF8 (S8) LW V0,B218 (S4) ORI A3,A3,8080 SW S5,0010 (SP) SW S6,0014 (SP) SW S7,0018 (SP) SW S2,001C (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW S1,002C (SP) SW S7,0030 (SP) SW S2,0034 (SP) JAL 807932F8 SW V0,0024 (SP) LW T1,0074 (SP) BEQ T1,S0,8078F344 ADDIU S5,S5,0015 LUI T1,8079 LW V0,5974 (T1) BEQ V0,S0,8078F344 LUI T1,8079 LW V0,5970 (T1) BEQ V0,R0,8078F38C NOP ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 ORI A3,A3,8080 LW A0,9DF8 (S8) LW V1,B218 (S4) ADDIU V0,R0,0008 SW S5,0010 (SP) SW S6,0014 (SP) SW S3,0018 (SP) SW S2,001C (SP) SW R0,0020 (SP) SW S7,0028 (SP) SW S1,002C (SP) SW V0,0030 (SP) SW S2,0034 (SP) JAL 807932F8 SW V1,0024 (SP) LW T1,0074 (SP) BEQ T1,S0,8078F3B4 ADDU S5,S5,S3 LUI T1,8079 LW V0,5974 (T1) BEQ V0,S0,8078F3B4 LUI T1,8079 LW V0,5970 (T1) BEQL V0,R0,8078F404 ADDIU S0,S0,0001 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 ORI A3,A3,8080 ADDIU T1,R0,0013 LW A0,9DF8 (S8) LW V1,B218 (S4) ADDIU V0,R0,001D SW S5,0010 (SP) SW S6,0014 (SP) SW T1,0018 (SP) SW S2,001C (SP) SW R0,0020 (SP) SW V0,0028 (SP) SW S1,002C (SP) SW T1,0030 (SP) SW S2,0034 (SP) JAL 807932F8 SW V1,0024 (SP) ADDIU S0,S0,0001 LW T1,006C (SP) LW S5,0060 (SP) SLT V0,S0,T1 BNE V0,R0,8078F29C ADDIU S6,S6,000E ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI S4,807A ORI A3,A3,8080 ADDIU S0,R0,0015 ADDIU S1,R0,0007 LUI S2,807A LW S5,0060 (SP) LW T1,006C (SP) LW A0,9DF8 (S4) ADDIU S3,R0,003A SW S0,0018 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW S3,002C (SP) SW S0,0030 (SP) SW S1,0034 (SP) SLL V0,T1,0x3 SUBU V0,V0,T1 SLL V0,V0,0x1 LW T1,0064 (SP) ADDIU V0,V0,0010 SW S5,0010 (SP) ADDU S6,T1,V0 LW V0,B218 (S2) ADDIU S5,S5,0015 SW S6,0014 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LW A0,9DF8 (S4) LW T1,0068 (SP) LW V1,B218 (S2) ORI A3,A3,8080 SW S5,0010 (SP) SW S6,0014 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW S0,0028 (SP) SW S3,002C (SP) SW S1,0034 (SP) SLL V0,T1,0x3 ADDU S5,S5,V0 SW V0,0018 (SP) ADDIU V0,R0,0008 SW V0,0030 (SP) JAL 807932F8 SW V1,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 ORI A3,A3,8080 ADDIU V1,R0,0013 LW A0,9DF8 (S4) LW T0,B218 (S2) ADDIU V0,R0,001D SW S5,0010 (SP) SW S6,0014 (SP) SW V1,0018 (SP) SW S1,001C (SP) SW R0,0020 (SP) SW V0,0028 (SP) SW S3,002C (SP) SW V1,0030 (SP) SW S1,0034 (SP) JAL 807932F8 SW T0,0024 (SP) LW RA,005C (SP) LW S8,0058 (SP) LW S7,0054 (SP) LW S6,0050 (SP) LW S5,004C (SP) LW S4,0048 (SP) LW S3,0044 (SP) LW S2,0040 (SP) LW S1,003C (SP) LW S0,0038 (SP) JR RA ADDIU SP,SP,0060 8078F564 ADDIU SP,SP,FFD8 LUI V1,807A LW T0,0038 (SP) ADDIU V1,V1,9D38 SW RA,0020 (SP) SLL V0,T0,0x1 ADDU V0,V0,T0 SLL V0,V0,0x2 ADDU V0,V0,V1 LW V1,0000 (V0) SW V1,0010 (SP) LW V1,0004 (V0) SW V1,0014 (SP) LUI V1,807A LW T0,0008 (V0) LW V0,B254 (V1) SRL V1,V0,0x1F ADDU V0,V0,V1 SRA V0,V0,0x1 ADDU A0,A0,V0 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW T0,0018 (SP) LW RA,0020 (SP) JR RA ADDIU SP,SP,0028 8078F5C8 ADDIU SP,SP,FFA0 SW S2,0040 (SP) ADDU S2,A1,R0 SW S5,004C (SP) ADDU S5,A2,R0 SW S8,0058 (SP) ADDU S8,A3,R0 SW S1,003C (SP) SW A0,0060 (SP) ADDIU S1,A0,0006 ADDU A0,S1,R0 SW S4,0048 (SP) ADDU S4,S2,S8 ADDIU A1,S4,FFFC SW S0,0038 (SP) ADDIU S0,S5,FFF4 ADDU A2,S0,R0 ADDIU A3,R0,0001 ADDIU V1,R0,0002 SW RA,005C (SP) SW S7,0054 (SP) SW S6,0050 (SP) SW S3,0044 (SP) JAL 8078F564 SW V1,0010 (SP) ADDU A0,S1,R0 ADDIU A1,S4,FFFD ADDU A2,S0,R0 ADDIU A3,R0,0001 ADDU S3,A3,R0 JAL 8078F564 SW S3,0010 (SP) ADDU A0,S1,R0 ADDIU A1,S4,FFFE ADDU A2,S0,R0 ADDIU A3,R0,0001 ADDIU S6,R0,0003 JAL 8078F564 SW S6,0010 (SP) ADDU A0,S1,R0 ADDIU A1,S4,FFFF ADDU A2,S0,R0 ADDIU A3,R0,0001 JAL 8078F564 SW S3,0010 (SP) ADDU A0,S1,R0 ADDU A1,S2,R0 ADDU A2,S0,R0 ADDIU A3,R0,0001 ADDIU V1,R0,0002 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S1,R0 ADDIU S7,S2,0001 ADDU A1,S7,R0 ADDU A2,S0,R0 ADDIU A3,R0,0001 JAL 8078F564 SW S3,0010 (SP) ADDU A0,S1,R0 ADDIU A1,S2,0002 ADDU A2,S0,R0 ADDIU A3,R0,0001 JAL 8078F564 SW S6,0010 (SP) ADDU A0,S1,R0 ADDU A1,S2,S6 ADDU A2,S0,R0 ADDIU A3,R0,0001 JAL 8078F564 SW S3,0010 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI V1,807A ORI A3,A3,8080 ADDIU S2,S2,0004 ADDIU S1,R0,000E ADDIU S8,S8,FFF8 LUI S6,807A LW A0,9DF8 (V1) LW V1,0060 (SP) LW V0,B218 (S6) ADDIU S0,R0,0007 SW S2,0014 (SP) SW S1,0018 (SP) SW S8,001C (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW S0,002C (SP) SW S1,0030 (SP) SW S3,0034 (SP) SW V1,0010 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI V1,807A LW A0,9DF8 (V1) LW V1,0060 (SP) LW V0,B218 (S6) ORI A3,A3,8080 SW S8,001C (SP) ADDIU S8,R0,0023 SW S2,0014 (SP) SW S1,0018 (SP) SW R0,0020 (SP) SW S8,0028 (SP) SW S0,002C (SP) SW S1,0030 (SP) SW S3,0034 (SP) ADDU S5,V1,S5 ADDIU S5,S5,FFF0 SW S5,0010 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI V1,807A ORI A3,A3,8080 LW A0,9DF8 (V1) LW V1,0060 (SP) LW V0,B218 (S6) ADDIU S0,R0,0006 SW S7,0014 (SP) SW S1,0018 (SP) SW S0,001C (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW R0,002C (SP) SW S1,0030 (SP) SW S0,0034 (SP) SW V1,0010 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI V1,807A LW A0,9DF8 (V1) LW V0,B218 (S6) ORI A3,A3,8080 SW S5,0010 (SP) SW S7,0014 (SP) SW S1,0018 (SP) SW S0,001C (SP) SW R0,0020 (SP) SW S8,0028 (SP) SW R0,002C (SP) SW S1,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI V1,807A ORI A3,A3,8080 ADDIU S4,S4,FFF8 ADDIU S0,R0,0007 LW A0,9DF8 (V1) LW V1,0060 (SP) LW V0,B218 (S6) ADDIU S2,R0,0004 SW S4,0014 (SP) SW S1,0018 (SP) SW S0,001C (SP) SW R0,0020 (SP) SW R0,0028 (SP) SW S2,002C (SP) SW S1,0030 (SP) SW S0,0034 (SP) SW V1,0010 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LUI V1,807A LW A0,9DF8 (V1) LW V0,B218 (S6) ORI A3,A3,8080 SW S5,0010 (SP) SW S4,0014 (SP) SW S1,0018 (SP) SW S0,001C (SP) SW R0,0020 (SP) SW S8,0028 (SP) SW S2,002C (SP) SW S1,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) LW RA,005C (SP) LW S8,0058 (SP) LW S7,0054 (SP) LW S6,0050 (SP) LW S5,004C (SP) LW S4,0048 (SP) LW S3,0044 (SP) LW S2,0040 (SP) LW S1,003C (SP) LW S0,0038 (SP) JR RA ADDIU SP,SP,0060 8078F904 print string A3 centered to A2 in colour SP+10 at {A0,A1} accepts: A0=xpos, A1=ypos, A2=p->string, A3=width (for centering), SP+10= font colour ADDIU SP,SP,FFD8 SW S1,0014 (SP) ADDU S1,A0,R0 SW S3,001C (SP) ADDU S3,A1,R0 SW S0,0010 (SP) ADDU S0,A2,R0 SW S2,0018 (SP) ADDU S2,A3,R0 SW S4,0020 (SP) LW S4,0038 (SP) SW RA,0024 (SP) JAL 807900A0 ;strlen(A0) ADDU A0,S2,R0 SRA S0,S0,0x1 ADDU S1,S1,S0 SLL V0,V0,0x3 SRA V0,V0,0x1 SUBU S1,S1,V0 ADDU A0,S2,R0 LUI V0,807A SW S3,B330 (V0) LUI V0,807A SW S1,B32C (V0) LUI V0,807A JAL 8078EE80 ;display string A0 using current display settings; 80-83 special SW S4,B250 (V0) LW RA,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 8078F990 LBU V0,0000 (A0) BEQ V0,R0,8078F9AC NOP ADDIU A0,A0,0001 LBU V0,0000 (A0) BNEL V0,R0,8078F9A0 ADDIU A0,A0,0001 JR RA ADDIU V0,A0,0001 8078F9B4 SW A3,000C (SP) ADDIU T0,SP,0010 SW A2,0008 (SP) SW A2,0008 (SP) SB R0,0000 (A2) LW A2,FFFC (T0) BLEZ A0,8078FA28 ADDU A3,R0,R0 ADDIU A1,A1,FFFF LBU V1,0000 (A2) BEQL V1,R0,8078FA0C ADDIU T0,T0,0004 SLT V0,A3,A1 BEQ V0,R0,8078FA08 ADDIU A2,A2,0001 LW V0,0008 (SP) ADDU V0,V0,A3 SB V1,0000 (V0) LBU V1,0000 (A2) BNE V1,R0,8078F9E4 ADDIU A3,A3,0001 ADDIU T0,T0,0004 LW V0,0008 (SP) ADDIU A0,A0,FFFF ADDU V0,V0,A3 SB R0,0000 (V0) LW A2,FFFC (T0) BGTZ A0,8078F9D8 ADDIU A3,A3,0001 JR RA NOP 8078FA30 ADDIU SP,SP,FFC0 SW S8,0038 (SP) LW S8,0054 (SP) SW S1,001C (SP) LW S1,0058 (SP) SW S4,0028 (SP) ADDU S4,A0,R0 SW S0,0018 (SP) ADDU S0,A1,R0 SW S2,0020 (SP) ADDU S2,A2,R0 SW RA,003C (SP) SW S7,0034 (SP) SW S6,0030 (SP) SW S5,002C (SP) SW S3,0024 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb SW A3,004C (SP) ADDIU S0,S0,0001 ADDIU A0,S4,0015 ADDU S3,R0,R0 ADDU A1,S0,R0 SLL A2,S2,0x3 SW R0,0010 (SP) JAL 8078F904 ;print string A3 centered to A2 in colour SP+10 at {A0,A1} ADDU A3,S1,R0 JAL 8078F990 ADDU A0,S1,R0 ADDU S1,V0,R0 LUI V0,807A LUI A0,807A LW V0,B254 (V0) LW T0,004C (SP) ADDIU S0,S0,0011 SW S0,B330 (A0) SRL V1,V0,0x1F ADDU V0,V0,V1 SRA V0,V0,0x1 ADDU S4,S4,V0 ADDIU S4,S4,0015 LUI V0,807A BLEZ T0,8078FB94 SW S4,B32C (V0) LUI S5,807A LUI S7,003E ORI S7,S7,003E LUI S6,001E ORI S6,S6,001E ADDU S0,A0,R0 ADDU S2,V0,R0 LW T0,0050 (SP) BNE T0,S3,8078FB2C SW R0,B250 (S5) BEQ S8,R0,8078FB48 SW S7,B250 (S5) LW V0,B330 (S0) LW V1,B32C (S2) SW S6,B250 (S5) ADDIU V0,V0,0001 ADDIU V1,V1,0001 SW V0,B330 (S0) J 8078FB48 SW V1,B32C (S2) LUI T0,8079 LW V0,5974 (T0) BEQ V0,S3,8078FB48 LUI T0,8079 LW V0,5970 (T0) BEQ V0,R0,8078FB50 NOP JAL 8078EE80 ;display string A0 using current display settings; 80-83 special ADDU A0,S1,R0 JAL 8078F990 ADDU A0,S1,R0 LW V1,B330 (S0) LW T0,0050 (SP) ADDU S1,V0,R0 SW S4,B32C (S2) ADDIU V0,V1,000E BNE T0,S3,8078FB80 SW V0,B330 (S0) BEQ S8,R0,8078FB80 ADDIU V0,V1,000D SW V0,B330 (S0) LW T0,004C (SP) ADDIU S3,S3,0001 SLT V0,S3,T0 BNE V0,R0,8078FAF8 NOP LW RA,003C (SP) LW S8,0038 (SP) LW S7,0034 (SP) LW S6,0030 (SP) LW S5,002C (SP) LW S4,0028 (SP) LW S3,0024 (SP) LW S2,0020 (SP) LW S1,001C (SP) LW S0,0018 (SP) JR RA ADDIU SP,SP,0040 8078FBC4 ADDIU SP,SP,FF78 LW V0,0098 (SP) SW S6,0078 (SP) ADDU S6,A0,R0 SW S5,0074 (SP) ADDU S5,A1,R0 SW S8,0080 (SP) ADDU S8,A3,R0 SW RA,0084 (SP) SW S7,007C (SP) SW S4,0070 (SP) SW S3,006C (SP) SW S2,0068 (SP) SW S1,0064 (SP) SW S0,0060 (SP) BNE V0,R0,8078FE28 SW A2,0090 (SP) ADDIU V1,S6,0003 ADDU A0,V1,R0 ADDU S0,S5,S8 ADDIU A1,S0,FFFC SW V1,0018 (SP) ADDIU V1,A2,FFFA ADDU A2,V1,R0 ADDIU A3,R0,0001 SW V1,001C (SP) ADDIU V1,R0,0002 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S6,0002 ADDU A0,V1,R0 ADDIU A1,S0,FFFD SW V1,0020 (SP) LW V1,0090 (SP) ADDIU A3,R0,0001 ADDIU V1,V1,FFFC ADDU A2,V1,R0 SW V1,0024 (SP) ADDU V1,A3,R0 JAL 8078F564 SW V1,0010 (SP) ADDIU S1,S6,0001 ADDU A0,S1,R0 ADDIU A1,S0,FFFE LW V1,0090 (SP) ADDIU A3,R0,0001 ADDIU V1,V1,FFFE ADDU A2,V1,R0 SW V1,0028 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S6,R0 ADDIU A1,S0,FFFF ADDIU A3,R0,0001 LW A2,0090 (SP) ADDU V1,A3,R0 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S6,R0 ADDU A1,S5,R0 ADDIU A2,R0,0001 ADDU A3,S8,R0 ADDIU V1,R0,0002 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S1,R0 ADDIU V1,S5,0001 ADDU A1,V1,R0 ADDIU A2,R0,0001 ADDIU S2,S8,FFFE ADDU A3,S2,R0 SW V1,002C (SP) ADDU V1,A2,R0 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S5,0002 ADDU A1,V1,R0 ADDIU A2,R0,0001 ADDIU S4,S8,FFFC LW A0,0020 (SP) ADDU A3,S4,R0 SW V1,0030 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S5,0003 ADDU A1,V1,R0 ADDIU A2,R0,0001 ADDIU S7,S8,FFFA LW A0,0018 (SP) ADDU A3,S7,R0 SW V1,0034 (SP) ADDU V1,A2,R0 JAL 8078F564 SW V1,0010 (SP) ADDU A1,S5,R0 ADDIU A2,R0,0001 LW V1,0090 (SP) ADDU A3,S8,R0 ADDU S0,S6,V1 ADDIU A0,S0,FFFC ADDIU V1,R0,0002 JAL 8078F564 SW V1,0010 (SP) ADDIU A0,S0,FFFD ADDIU A2,R0,0001 ADDU A3,S2,R0 LW A1,002C (SP) ADDU V1,A2,R0 JAL 8078F564 SW V1,0010 (SP) ADDIU A0,S0,FFFE ADDIU A2,R0,0001 ADDU A3,S4,R0 LW A1,0030 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDIU A0,S0,FFFF ADDIU A2,R0,0001 ADDU A3,S7,R0 LW A1,0034 (SP) ADDU V1,A2,R0 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S6,R0 ADDU A1,S5,R0 ADDIU A3,R0,0001 LW A2,0090 (SP) ADDIU V1,R0,0002 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S1,R0 ADDIU A3,R0,0001 LW A1,002C (SP) LW A2,0028 (SP) ADDU V1,A3,R0 JAL 8078F564 SW V1,0010 (SP) ADDIU A3,R0,0001 LW A0,0020 (SP) LW A1,0030 (SP) LW A2,0024 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDIU A3,R0,0001 LW A0,0018 (SP) LW A1,0034 (SP) LW A2,001C (SP) J 80790050 ADDU V1,A3,R0 ADDIU V1,S6,0003 ADDU A0,V1,R0 ADDU S0,S5,S8 ADDIU A1,S0,FFFC SW V1,0038 (SP) LW V1,0090 (SP) ADDIU A3,R0,0001 ADDIU V1,V1,FFFA ADDU A2,V1,R0 SW V1,003C (SP) ADDIU V1,R0,0009 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S6,0002 ADDU A0,V1,R0 ADDIU A1,S0,FFFD SW V1,0040 (SP) LW V1,0090 (SP) ADDIU A3,R0,0001 ADDIU V1,V1,FFFC ADDU A2,V1,R0 SW V1,0044 (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S6,0001 ADDU A0,V1,R0 ADDIU A1,S0,FFFE SW V1,0048 (SP) LW V1,0090 (SP) ADDIU A3,R0,0001 ADDIU V1,V1,FFFE ADDU A2,V1,R0 SW V1,004C (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S6,R0 ADDIU A1,S0,FFFF ADDIU A3,R0,0001 LW A2,0090 (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S6,R0 ADDU A1,S5,R0 ADDIU A2,R0,0001 ADDU A3,S8,R0 ADDIU V1,R0,0009 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S5,0001 ADDU A1,V1,R0 ADDIU A2,R0,0001 SW V1,0050 (SP) ADDIU V1,S8,FFFE LW A0,0048 (SP) ADDU A3,V1,R0 SW V1,0054 (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S5,0002 ADDU A1,V1,R0 ADDIU A2,R0,0001 ADDIU S3,S8,FFFC LW A0,0040 (SP) ADDU A3,S3,R0 SW V1,0058 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDIU V1,S5,0003 ADDU A1,V1,R0 ADDIU A2,R0,0001 ADDIU S7,S8,FFFA LW A0,0038 (SP) ADDU A3,S7,R0 SW V1,005C (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDU A1,S5,R0 ADDIU A2,R0,0001 LW V1,0090 (SP) ADDU A3,S8,R0 ADDU S0,S6,V1 ADDIU A0,S0,FFFC ADDIU V1,R0,0009 JAL 8078F564 SW V1,0010 (SP) ADDIU A0,S0,FFFD ADDIU A2,R0,0001 LW A1,0050 (SP) LW A3,0054 (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDIU A0,S0,FFFE ADDIU A2,R0,0001 ADDU A3,S3,R0 LW A1,0058 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDIU A0,S0,FFFF ADDIU A2,R0,0001 ADDU A3,S7,R0 LW A1,005C (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDU A0,S6,R0 ADDU A1,S5,R0 ADDIU A3,R0,0001 LW A2,0090 (SP) ADDIU V1,R0,0009 JAL 8078F564 SW V1,0010 (SP) ADDIU A3,R0,0001 LW A0,0048 (SP) LW A1,0050 (SP) LW A2,004C (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) ADDIU A3,R0,0001 LW A0,0040 (SP) LW A1,0058 (SP) LW A2,0044 (SP) ADDIU V1,R0,0003 JAL 8078F564 SW V1,0010 (SP) ADDIU A3,R0,0001 LW A0,0038 (SP) LW A1,005C (SP) LW A2,003C (SP) ADDIU V1,R0,0008 JAL 8078F564 SW V1,0010 (SP) LW RA,0084 (SP) LW S8,0080 (SP) LW S7,007C (SP) LW S6,0078 (SP) LW S5,0074 (SP) LW S4,0070 (SP) LW S3,006C (SP) LW S2,0068 (SP) LW S1,0064 (SP) LW S0,0060 (SP) JR RA ADDIU SP,SP,0088 80790088 unconditional return JR RA NOP 80790090 unconditional return JR RA NOP 80790098 unconditional return JR RA NOP 807900A0 strlen(A0) accepts: A0=p->string J 807900AC ADDU V1,R0,R0 ;V1=0 init.count //807900A8: ADDIU V1,V1,0001 ;V1++ count++ //807900AC: LBU V0,0000 (A0) ;V0=char BNE V0,R0,807900A8 ;loop until NULL ADDIU A0,A0,0001 ;A0++ p->next char JR RA ADDU V0,V1,R0 ;V0=V1: length of string 807900C0 A1->SP+4, A2->SP+8, A3->SP+C SW A1,0004 (SP) SW A2,0008 (SP) SW A3,000C (SP) JR RA NOP 807900D4 V0=0 JR RA ADDU V0,R0,R0 807900DC likely data ;BNE S1,R0,80790104 807900E0 accepts: A0=option#, A1=mode ADDIU SP,SP,FEC8 SW S0,0128 (SP) ADDU S0,A0,R0 ;S0=A0: option# SW S1,012C (SP) SW RA,0130 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb ADDU S1,A1,R0 ;S1=A1: mode ADDU T4,R0,R0 ;T4=0 ADDU T5,R0,R0 ;T5=0 ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 LUI AT,807A SW T4,B228 (AT) ;0->8079B228: black LUI AT,807A SW T5,B22C (AT) ;0->8079B22C: black JAL 80784940 ;fill region {A0,A1} to {A2,A3} with colour ADDIU A3,R0,00F0 ;A3=F0 JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP ADDIU A0,R0,0006 ADDIU A1,R0,00C8 LUI A2,807A LUI V0,807A ADDIU V1,A2,9E20 LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data LW A3,0040 (V1) LW T0,0058 (V1) LW V0,0004 (V0) ;V0=codegen.runtime+4: LW T1,01D0 (V1) ADDIU V0,V0,0011 SLL V0,V0,0x2 ADDU V0,V0,V1 LW T2,0000 (V0) LW V0,9E20 (A2) LW V1,0004 (V1) ADDIU A2,SP,0028 SW T0,0018 (SP) SW T1,001C (SP) SW V0,0014 (SP) SW V1,0020 (SP) JAL 8078F9B4 SW T2,0010 (SP) ADDIU A0,R0,0024 ;A0=24: ADDIU A1,R0,0032 ;A1=32: ADDIU A2,R0,001A ;A2=1A: ADDIU A3,R0,0005 ;A3=5: LUI V1,8079 ADDIU V0,R0,0001 SW V0,5970 (V1) ;1->80795970: SW R0,0010 (SP) ;0->SP+10: SW S0,0014 (SP) ;S0->SP+14: JAL 8078F11C SW S1,0018 (SP) ;S1->SP+18: ADDIU A0,R0,0024 ADDIU A1,R0,0032 ADDIU A2,R0,001A ADDIU A3,R0,0005 ADDIU V0,SP,0028 SW S0,0010 (SP) SW S1,0014 (SP) JAL 8078FA30 SW V0,0018 (SP) JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP //807901E4: return LW RA,0130 (SP) LW S1,012C (SP) LW S0,0128 (SP) JR RA ADDIU SP,SP,0138 807901F8 toggle codes on/off LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW V0,0004 (V1) ;V0=V1+4: flag BNE V0,R0,80790214 ;branch if set ADDIU V0,R0,0001 JR RA SW V0,0004 (V1) ;1->A07E9C04: codes disabled //80790214: unset flag JR RA SW R0,0004 (V1) ;0->A07E9C04: codes on 8079021C LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data ADDIU SP,SP,FFE8 SW RA,0010 (SP) LW A0,0088 (V0) ;A0=codegen.runtime+88: prev.menu sel.option JAL 807900E0 ADDU A1,R0,R0 ;A1=0 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80790244 LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data ADDIU SP,SP,FFE8 SW RA,0010 (SP) LW A0,0088 (V0) ;A0=codegen.runtime+88: prev.menu sel.option JAL 807900E0 ADDIU A1,R0,0001 ;A1=1 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 8079026C ADDIU SP,SP,FFB8 SW S0,0020 (SP) ADDU S0,R0,R0 SW S4,0030 (SP) ADDU S4,S0,R0 SW S3,002C (SP) ADDIU S3,R0,0001 SW S1,0024 (SP) LUI S1,807A LW A1,9E10 (S1) ;A1=80799E10: p->codegen runtime data LUI V0,8079 SW RA,0040 (SP) SW S7,003C (SP) SW S6,0038 (SP) SW S5,0034 (SP) SW S2,0028 (SP) LW A0,00E4 (A1) ADDIU V1,R0,FFFF BEQ A0,R0,8079033C SW V1,5974 (V0) ADDU A0,S0,R0 ADDU A1,S0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 807828C8 ADDU A0,S0,R0 ADDU S0,V0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S0,00E4 (V0) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) BNE S0,R0,8079039C LUI S2,807A LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,0088 (V0) JAL 807900E0 ADDU A1,S3,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 J 80790388 ADDIU A3,R0,00F0 // LW V0,008C (A1) BEQ V0,R0,80790398 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) ;SP+10=0 black SW R0,0014 (SP) ;SP+14=0 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;SP+18=0 JAL 80792438 ;memory editor constructor and interface NOP ADDU S0,V0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 SW S0,008C (V0) SW R0,0010 (SP) ;SP+10=0 black SW R0,0014 (SP) ;SP+14=0 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;SP+18=0 LUI S2,807A LUI V0,8079 ADDIU S7,V0,5040 LUI S6,8079 LUI S5,8079 JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP LUI V1,0800 ORI V1,V1,0002 ADDU S1,V0,R0 AND V1,S1,V1 BEQ V1,R0,807903E8 LUI V0,0400 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,0088 (V1) BLEZ V0,807903E4 ADDIU V0,V0,FFFF SW V0,0088 (V1) ADDIU S4,R0,0001 LUI V0,0400 ORI V0,V0,0001 AND V0,S1,V0 BEQ V0,R0,80790418 LUI V0,1000 LW A0,9E10 (S2) ;A0=80799E10: p->codegen runtime data LW V1,0088 (A0) SLTI V0,V1,0004 BEQ V0,R0,80790414 ADDIU V0,V1,0001 SW V0,0088 (A0) ADDIU S4,R0,0001 LUI V0,1000 AND V0,S1,V0 BNEL V0,R0,80790424 ADDIU S0,R0,0001 BGEZ S1,80790568 NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,0088 (V0) JAL 807900E0 ADDIU A1,R0,0001 LUI A0,8000 LUI A1,8079 JAL 80792FB0 ADDIU A1,A1,0244 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V1,0088 (V0) SLTIU V0,V1,0005 BEQ V0,R0,80790568 SLL V0,V1,0x2 ADDU V0,V0,S7 LW V0,0000 (V0) JR V0 NOP // JAL 807901F8 ;toggle codes on/off NOP J 80790568 NOP // JAL 807828C8 ADDIU A0,R0,0001 ADDU S0,V0,R0 ;S0=V0: ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 ;A3=F0 SW S0,00E4 (V0) ;S0->codegen.runtime+E4: SW R0,0010 (SP) ;0->SP+10: SW R0,0014 (SP) ;0->SP+14: JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;0->SP+18: LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDIU S3,R0,0001 ;S3=1 LW A0,0088 (V0) ;A0=codegen.runtime+88: prev.menu sel.option JAL 807900E0 ADDU A1,R0,R0 ;A1=0 ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 J 80790500 ADDIU A3,R0,00F0 ;A3=F0 // JAL 80792438 ;memory editor constructor and interface NOP ADDU S0,V0,R0 ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,00F0 ;A3=F0 SW S0,008C (V0) ;S0->codegen.runtime+8C: SW R0,0010 (SP) ;0->SP+10: black SW R0,0014 (SP) ;0->SP+14 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;0->SP+18 J 80790568 NOP // JAL 8078315C ADDIU S3,R0,0001 ;S3=1 JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP JAL 80785460 ;wait until video refresh NOP ADDU T0,R0,R0 ADDU T1,R0,R0 LUI AT,807A SW T0,B228 (AT) ;0->8079B228: black LUI AT,807A SW T1,B22C (AT) ;0->8079B22C: black ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 JAL 80784940 ;fill region {A0,A1} to {A2,A3} with colour ADDIU A3,R0,00F0 ;A3=F0 J 80790568 NOP //80790564: force return ADDIU S0,R0,0001 ;S0=1 return //80790568: BNE S0,R0,807905D8 ;return if S0 set ADDU A1,R0,R0 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,0088 (V0) ;A0=codegen.runtime+88: prev.menu sel.option JAL 807900E0 SW S3,5970 (S6) ;S3=80795970: LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,0088 (V1) ;V0=codegen.runtime+88: prev.menu sel.option ADDU S3,R0,R0 ;S3=0 BNE S1,R0,8079059C ;skip if S1 set SW V0,5974 (S5) ;V0->80795974: ADDIU V0,R0,0001 SW V0,0074 (V1) ;1->codegen.runtime+74: //8079059C: BEQ S4,R0,807903AC ;skip if S4 not set ADDU A0,S1,R0 ;A0=S1: ADDIU A1,R0,0003 ;A1=3 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data //807903AC: LUI A3,8079 LW A2,0074 (V0) ;A2=codegen.runtime+74: ADDIU A3,A3,021C ;A3+=21C: JAL 80793008 ;execute function A3 A1 times SW R0,5970 (S6) ;0->80795970: LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V1,0088 (V0) ;V1=codegen.runtime+88: prev.menu sel.option ADDU S4,R0,R0 ;S4=0 SW R0,0074 (V0) ;0->codegen.runtime+74: J 807903AC SW V1,5974 (S5) ;V1->80795974: prev.menu sel.option //807905D8: return LW RA,0040 (SP) LW S7,003C (SP) LW S6,0038 (SP) LW S5,0034 (SP) LW S4,0030 (SP) LW S3,002C (SP) LW S2,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0048 80790604 unconditional return JR RA NOP 8079060C LUI A0,807A LW V1,9E10 (A0) ;V1=80799E10: p->codegen runtime data LW V0,0044 (V1) BNE V0,R0,80790624 ADDIU V0,R0,0001 SW V0,0044 (V1) LW V0,9E10 (A0) ;V0=80799E10: p->codegen runtime data SW R0,0050 (V0) SW R0,0054 (V0) JR RA SW R0,0108 (V0) 80790638 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data ADDIU SP,SP,FFA8 SW RA,0054 (SP) SW S8,0050 (SP) SW S7,004C (SP) SW S6,0048 (SP) SW S5,0044 (SP) SW S4,0040 (SP) SW S3,003C (SP) SW S2,0038 (SP) SW S1,0034 (SP) SW S0,0030 (SP) SW A0,0058 (SP) LW V0,00BC (V1) BLEZ V0,80790810 LUI V0,807A LW V0,00B4 (V1) BEQ V0,R0,80790694 LUI V0,8079 LW V1,5980 (V0) J 8079069C ADDIU V0,R0,002E LW V1,5980 (V0) ADDIU V0,R0,002A SUBU S5,V0,V1 LUI A2,807A LW A1,9E10 (A2) ;A1=80799E10: p->codegen runtime data LW V0,00DC (A1) LW V1,00C0 (A1) LW A0,00BC (A1) ADDU V0,V0,V1 SLT V0,V0,A0 BNE V0,R0,807906CC ADDIU S3,R0,002C SW R0,00DC (A1) SW R0,00C0 (A1) LW V0,9E10 (A2) ;V0=80799E10: p->codegen runtime data ADDIU S4,R0,FFFF LW S0,00DC (V0) LW T0,0058 (SP) BNE T0,R0,807906EC ADDIU S6,S0,000E LW V0,00C0 (V0) ADDU S4,S0,V0 SLT V0,S0,S6 BEQ V0,R0,80790810 LUI V0,807A ADDU S7,A2,R0 ADDIU S8,S5,0044 LW V0,9E10 (S7) ;V0=80799E10: p->codegen runtime data LW V0,00BC (V0) SLT V0,S0,V0 BEQ V0,R0,80790800 ADDIU A0,R0,001A ADDU A1,S3,R0 ADDIU A2,R0,006C ADDIU A3,R0,0008 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V0,9E10 (S7) ;V0=80799E10: p->codegen runtime data LW V0,00C8 (V0) SLL S2,S0,0x2 ADDU V0,S2,V0 LW A0,0000 (V0) JAL 80793534 ;sprintf(A1,"%08d",A0) ADDIU A1,SP,0020 LUI A3,7BDE BNE S0,S4,80790760 ORI A3,A3,7BDE LUI A3,FFFE ORI A3,A3,FFFE ADDU A0,S5,R0 ADDU A1,S3,R0 JAL 80792BF8 ADDIU A2,SP,0020 LW A1,9E10 (S7) ;A1=80799E10: p->codegen runtime data ADDIU S1,R0,0006 LW V0,00C8 (A1) ADDU V0,S2,V0 LW A2,0000 (V0) LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0010 LBU A0,0000 (A2) BNE V1,V0,807907B0 ADDIU A3,R0,0003 SLL A0,A0,0x8 ADDIU S1,R0,0004 LBU V0,0001 (A2) ADDIU A3,R0,0005 OR A0,A0,V0 LW V0,00B4 (A1) BEQ V0,R0,807907D0 ADDIU A1,SP,0020 JAL 80793534 ;sprintf(A1,"%08d",A0) ADDIU A1,SP,0020 ADDIU V0,SP,0020 J 807907DC ADDU A2,V0,S1 JAL 80794878 ADDU A2,A3,R0 ADDIU A2,SP,0020 LUI A3,7BDE BNE S0,S4,807907F0 ORI A3,A3,7BDE LUI A3,FFFE ORI A3,A3,FFFE ADDU A0,S8,R0 JAL 80792BF8 ADDU A1,S3,R0 ADDIU S3,S3,0008 ADDIU S0,S0,0001 SLT V0,S0,S6 BNE V0,R0,80790700 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW V0,0160 (V1) BLEZ V0,807909C4 NOP LW V0,00B4 (V1) BEQ V0,R0,80790838 LUI V0,8079 LW V1,5980 (V0) J 80790840 ADDIU V0,R0,00CE LW V1,5980 (V0) ADDIU V0,R0,00CA SUBU S5,V0,V1 LUI A2,807A LW A1,9E10 (A2) ;A1=80799E10: p->codegen runtime data LW V0,00E0 (A1) LW V1,00C4 (A1) LW A0,0160 (A1) ADDU V0,V0,V1 SLT V0,V0,A0 BNE V0,R0,80790870 ADDIU S3,R0,002C SW R0,00E0 (A1) SW R0,00C4 (A1) ADDIU S4,R0,FFFF LW V1,9E10 (A2) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0001 LW S0,00E0 (V1) LW T0,0058 (SP) BNE T0,V0,80790894 ADDIU S6,S0,000E LW V0,00C4 (V1) ADDU S4,S0,V0 SLT V0,S0,S6 BEQ V0,R0,807909C4 ADDU S7,A2,R0 ADDIU S8,S5,0044 SLL V0,S0,0x1 ADDU V0,V0,S0 SLL S2,V0,0x1 LW V0,9E10 (S7) ;V0=80799E10: p->codegen runtime data LW V0,0160 (V0) SLT V0,S0,V0 BEQ V0,R0,807909B4 ADDIU A0,R0,00BA ADDU A1,S3,R0 ADDIU A2,R0,006C ADDIU A3,R0,0008 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V0,9E10 (S7) ;V0=80799E10: p->codegen runtime data LW V0,00CC (V0) ADDIU A1,SP,0020 ADDU V0,S2,V0 LHU V1,0000 (V0) LHU A0,0002 (V0) SLL V1,V1,0x10 JAL 80793534 ;sprintf(A1,"%08d",A0) OR A0,V1,A0 LUI A3,7BDE BNE S0,S4,80790918 ORI A3,A3,7BDE LUI A3,FFFE ORI A3,A3,FFFE ADDU A0,S5,R0 ADDU A1,S3,R0 JAL 80792BF8 ADDIU A2,SP,0020 ADDIU S1,R0,0006 LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0010 BNE V1,V0,80790948 ADDIU A3,R0,0003 ADDIU S1,R0,0004 ADDIU A3,R0,0005 LW V1,9E10 (S7) ;V1=80799E10: p->codegen runtime data LW V0,00B4 (V1) BEQ V0,R0,80790978 ADDIU A1,SP,0020 LW V0,00CC (V1) ADDU V0,S2,V0 LH A0,0004 (V0) JAL 80793534 ;sprintf(A1,"%08d",A0) ADDIU A1,SP,0020 ADDIU V0,SP,0020 J 80790990 ADDU A2,V0,S1 LW V0,00CC (V1) ADDU V0,S2,V0 LHU A0,0004 (V0) JAL 80794878 ADDU A2,A3,R0 ADDIU A2,SP,0020 LUI A3,7BDE BNE S0,S4,807909A4 ORI A3,A3,7BDE LUI A3,FFFE ORI A3,A3,FFFE ADDU A0,S8,R0 JAL 80792BF8 ADDU A1,S3,R0 ADDIU S3,S3,0008 ADDIU S0,S0,0001 SLT V0,S0,S6 BNE V0,R0,807908B0 ADDIU S2,S2,0006 JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LW RA,0054 (SP) LW S8,0050 (SP) LW S7,004C (SP) LW S6,0048 (SP) LW S5,0044 (SP) LW S4,0040 (SP) LW S3,003C (SP) LW S2,0038 (SP) LW S1,0034 (SP) LW S0,0030 (SP) ADDU V0,R0,R0 JR RA ADDIU SP,SP,0058 80790A00 ADDIU SP,SP,FFD0 SW S1,0024 (SP) ADDU S1,A0,R0 SW S0,0020 (SP) SW RA,0028 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb ADDU S0,A1,R0 BEQ S0,R0,80790AA8 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,0002 ADDIU A1,R0,0018 ADDIU A2,R0,009C ADDIU A3,R0,0090 JAL 8078F5C8 SW R0,0010 (SP) ADDIU A0,R0,00A2 ADDIU A1,R0,0018 ADDIU A2,R0,009C ADDIU A3,R0,0090 JAL 8078F5C8 SW R0,0010 (SP) ADDIU A0,R0,0002 ADDIU A1,R0,0018 LUI S0,807A ADDIU S0,S0,9E20 LW A3,017C (S0) ADDIU A2,R0,000E JAL 8078EF90 SW R0,0010 (SP) ADDIU A0,R0,00A2 ADDIU A1,R0,0018 LW A3,0180 (S0) ADDIU A2,R0,000E JAL 8078EF90 SW R0,0010 (SP) ADDU A0,R0,R0 ADDIU A1,R0,00B0 ADDIU A2,R0,0140 ADDIU A3,R0,0040 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,00B0 LUI A2,FFFE LUI V0,807A ADDIU S0,V0,9E20 LW A1,018C (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00C8 LUI A2,FFFE LW A1,01A0 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00D0 LUI A2,FFFE LW A1,01B4 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE BNE S1,R0,80790B34 ADDIU A0,R0,00B8 LUI A2,FFFE LW A1,0190 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00C0 LW A1,0194 (S0) J 80790B50 LUI A2,FFFE LUI A2,FFFE LW A1,0198 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00C0 LUI A2,FFFE LW A1,019C (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LW RA,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0030 80790B74 initialize ??? in codegen runtime data LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data SW R0,00B8 (V0) ;0->codegen.data+B8: SW R0,00DC (V0) ;0->codegen.data+DC: SW R0,00E0 (V0) ;0->codegen.data+E0: SW R0,00C0 (V0) ;0->codegen.data+C0: JR RA SW R0,00C4 (V0) ;0->codegen.data+C4: 80790B94 add active code entry A0.A1 accepts: A0=code.address, A1=code.data ADDU A3,A1,R0 ;A3=A1: code.data LUI A2,807A LW A1,9E10 (A2) ;A1=80799E10: p->codegen runtime data ADDIU SP,SP,FFE8 SW RA,0010 (SP) LW V1,0160 (A1) ;V1=codegen.runtime+160: #active codes SLL V0,V1,0x1 ADDU V0,V0,V1 LW V1,00CC (A1) ;V1=codegen.runtime+CC: p->active codelist SLL V0,V0,0x1 ;V0=V1*6: offset to next code location ADDU V0,V0,V1 ;V0=codelist+offset: p->new code SRL V1,A0,0x10 ;V1=A0/10000: upper short of code.address SH V1,0000 (V0) ;V1->V0+0: add upper short of code.address to list //80790BC8: LW V1,0160 (A1) ;V1=codegen.runtime+160: #active codes SLL V0,V1,0x1 ADDU V0,V0,V1 LW V1,00CC (A1) ;V1=codegen.runtime+CC: p->active codelist SLL V0,V0,0x1 ;V0=V1*6: offset to next code location ADDU V0,V0,V1 ;V0=codelist+offset: p->new code SH A0,0002 (V0) ;V1->V0+2: add lower short of code.address to list //80790BE4: if 80795980=10, force as a 2-byte code LUI V0,8079 LW V1,5980 (V0) ;V1=80795980: ADDIU V0,R0,0010 BNE V1,V0,80790C1C ;branch if not 10 NOP LW V0,0160 (A1) ;V0=codegen.runtime+160: #active codes SLL V1,V0,0x1 ADDU V1,V1,V0 LW V0,00CC (A1) ;V0=codegen.runtime+CC: p->active codelist SLL V1,V1,0x1 ;V1=V0*6: offset to next code location ADDU V1,V1,V0 ;V0=codelist+offset: p->new code LHU V0,0000 (V1) ;V0=code.address.upper ORI V0,V0,0100 ;V0|=0100: 2-byte code SH V0,0000 (V1) ;update code //80790C1C: save data LW A1,9E10 (A2) ;A1=80799E10: p->codegen runtime data LUI A0,0002 LW V1,0160 (A1) ;V1=codegen.runtime+160: #active codes ORI A0,A0,EF00 ;A0=2EF00: GS ROM+2EF00: saved active codelist SLL V0,V1,0x1 ADDU V0,V0,V1 LW V1,00CC (A1) ;V1=codegen.runtime+CC: p->active codelist SLL V0,V0,0x1 ;V0=V1*6: offset to next code location ADDU V0,V0,V1 ;V0=codelist+offset: p->new code SH A3,0004 (V0) ;A3->V0+4: add code.data to list //80790C44: update count and save active codelist to ROM LW V0,0160 (A1) ;V0=codegen.runtime+160: #active codes ADDIU A2,R0,0100 ;A2=100 ADDIU V0,V0,0001 ;V0++ count++ SW V0,0160 (A1) ;V0->codegen.runtime+160: update #active codes JAL 80780A04 ;copy A2 bytes from dram A1 to GS offset A0 ADDIU A1,A1,0160 ;A1+=160: p->active code list segment //80790C5C: return LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80790C68 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data ADDIU SP,SP,FFC8 SW RA,0034 (SP) SW S2,0030 (SP) SW S1,002C (SP) SW S0,0028 (SP) LW V0,0160 (V1) BNE V0,R0,80790C98 SLL V0,A0,0x1 J 80790D68 ADDU V0,R0,R0 ADDU V0,V0,A0 ADDIU S2,V0,0002 SLL V0,S2,0x1 LW S1,0000 (V1) LW V1,00B4 (V1) ADDU V0,V0,S1 LH S0,0000 (V0) BEQ V1,R0,80790CCC ADDIU A1,R0,0064 ADDIU A2,R0,008C LUI V0,807A J 80790CD8 ADDIU A3,R0,0010 ADDIU A2,R0,008C LUI V0,807A ADDIU A3,R0,000A LW A0,9FCC (V0) LUI V0,8079 LW V1,5980 (V0) ADDIU V0,SP,0020 SW S0,0014 (SP) SW R0,0018 (SP) SW V0,001C (SP) JAL 807942EC SW V1,0010 (SP) ADDU S0,V0,R0 ORI V0,R0,FFFF SLT V0,V0,S0 BNEL V0,R0,80790D10 ORI S0,R0,FFFF JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,4000 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 LW V0,0020 (SP) BNE V0,R0,80790D34 SLL V0,S2,0x1 ADDU V0,V0,S1 SH S0,0000 (V0) LW V1,0020 (SP) ADDIU V0,R0,0002 BEQ V1,V0,80790D64 LUI A0,0002 ORI A0,A0,EF00 ;A0=2EF00: GS ROM+2EF00: saved active codelist LUI V0,807A LW A1,9E10 (V0) ;A1=80799E10: p->codegen runtime data ADDIU A2,R0,0100 ;A2=100 JAL 80780A04 ;copy A2 bytes from dram A1 to GS offset A0 ADDIU A1,A1,0160 ;A1+=160: p->active codelist J 80790D68 ;return FALSE ADDU V0,R0,R0 //80790D64: return TRUE ADDIU V0,R0,0001 ;V0=1: return TRUE //80790D68: return LW RA,0034 (SP) LW S2,0030 (SP) LW S1,002C (SP) LW S0,0028 (SP) JR RA ADDIU SP,SP,0038 80790D80 ADDIU SP,SP,FFD8 SW S0,0020 (SP) ADDU S0,A0,R0 ADDU A0,R0,R0 ADDIU A1,R0,00D8 ADDIU A2,R0,0140 ADDIU A3,R0,0008 SW RA,0024 (SP) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,00D8 ADDU A1,S0,R0 LUI A2,FFC0 JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFC0 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data ADDIU V0,R0,0078 SW V0,00B8 (V1) LW RA,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0028 80790DE4 V0=SUCCEEDED/FAILED to remove active code# A0 accepts: A0=code# LUI V0,807A LW A1,9E10 (V0) ;A1=80799E10: p->codegen runtime data ADDIU SP,SP,FFE8 SW RA,0010 (SP) LW V1,0160 (A1) ;V1=codegen.runtime+160: #active codes BEQ V1,R0,80790EC0 ;if #codes already zero, return FAILED! ADDU V0,R0,R0 ;V0=0 //80790E00: SLL V0,A0,0x1 ADDU A2,V0,A0 ;A2=code*3: LW A0,0000 (A1) ;A0=codegen.runtime+0: p->active codelist SLL V0,V1,0x1 ADDU V0,V0,V1 ;V0=total*3 SLT V0,A2,V0 ;V0=TRUE if code#codegen.runtime ADDU A1,V0,A0 ;A1=p->code in list //80790E28: shift contents of list forward LHU V0,0006 (A1) ;V0=next.code[0] LHU V1,0008 (A1) ;V1=next.code[2] LHU A0,000A (A1) ;A0=next.code[4] ADDIU A2,A2,0003 ;A2+=3: 3(code+1) SH V0,0000 (A1) ;V0->code[0] SH V1,0002 (A1) ;V1->code[2] SH A0,0004 (A1) ;A0->code[4] LW V1,0160 (A3) ;V1=codegen.runtime+160: #active codes SLL V0,V1,0x1 ADDU V0,V0,V1 ;V0=total*3 SLT V0,A2,V0 ;TRUE if code+1 < total BNE V0,R0,80790E28 ;loop until last code ADDIU A1,A1,0006 ;A1+=6: p->next code //80790E5C: update codegen registers LUI V0,807A LW A1,9E10 (V0) ;A1=80799E10: p->codegen runtime data LW V1,0160 (A1) ;V1=codegen.runtime+160: #active codes LW A2,00E0 (A1) ;A2=codegen.runtime+E0: LW A0,00C4 (A1) ;A0=codegen.runtime+C4: ADDIU V1,V1,FFFF ;V1-- #codes-- ADDU V0,A2,A0 ;V0=A2+A0: SLT V0,V0,V1 ;TRUE if A2+A0 < #codes-1 BNE V0,R0,80790EA0 SW V1,0160 (A1) ;V1->codegen.runtime+160: update # active codes BLEZ A0,80790E94 ADDIU V0,A0,FFFF ;V0=A0-1: J 80790EA0 SW V0,00C4 (A1) ;V0->codegen.runtime+C4: //80790E94: BLEZ A2,80790EA0 ADDIU V0,A2,FFFF ;V0=A2-1: SW V0,00E0 (A1) ;V0->codegen.runtime+E0: //80790EA0: update GS ROM LUI A0,0002 LUI V0,807A LW A1,9E10 (V0) ;A1=80799E10: p->codegen runtime data ORI A0,A0,EF00 ;A0=2EF00: GS ROM+2EF00: saved active codelist ADDIU A2,R0,0100 ;A2=100 JAL 80780A04 ;copy A2 bytes from dram A1 to GS offset A0 ADDIU A1,A1,0160 ;A1+=160: p->active codelist segment //80790EBC: return SUCCESS! ADDIU V0,R0,0001 ;V0=1 //80790EC0: return LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80790ECC V0=#active code entry matching address and type A0, or -1 if not found accepts: A0=code.address LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW V0,0160 (V1) ;V0=codegen.data+160: #active codes BNE V0,R0,80790EF0 ;branch if codes present NOP JR RA ADDIU V0,R0,FFFF ;return V0=-1 //80790EE8: return V0=count JR RA ADDU V0,A1,R0 ;V0=A1: count //80790EF0: grab p->active codelist LW T0,0000 (V1) ;T0=p->active codelist BLEZ V0,80790F4C ;return if invalid pointer ADDU A2,R0,R0 ;A2=0 init.count ADDU A3,V0,R0 ;A3=V0: #codes SLL V0,A2,0x10 //80790F04: find an active code with same address and type as A0 SRA A1,V0,0x10 ;A1=(short) count SLL V1,A1,0x1 ADDU V1,V1,A1 SLL V1,V1,0x1 ;V1=count*6 ADDU V1,V1,T0 ;V1+=T0: p->code A2 LH V0,0000 (V1) ;V0=upper half of code.address LHU V1,0002 (V1) ;V1=lower half of code.address ANDI V0,V0,FCFF ;V0&=FCFFFFFF: removes SIZE and NOT flags SLL V0,V0,0x10 OR V0,V0,V1 ;V0|=V1: code.address BEQ V0,A0,80790EE8 ;return count if addresses&types match ADDIU V0,A2,0001 ADDU A2,V0,R0 ;A2++ count++ SLL V0,V0,0x10 SRA V0,V0,0x10 ;V0->short SLT V0,V0,A3 BNE V0,R0,80790F04 ;loop until out of codes SLL V0,A2,0x10 //80790F4C: return unsuccessful JR RA ADDIU V0,R0,FFFF ;V0=-1 80790F54 unconditional return JR RA NOP 80790F5C LUI V0,807A LW A0,9E10 (V0) ;A0=80799E10: p->codegen runtime data LW V1,00D8 (A0) ADDIU V0,R0,0001 BNE V1,V0,80790FA4 NOP LW V0,00C4 (A0) BLEZ V0,80790F8C ADDIU V0,V0,FFFF SW V0,00C4 (A0) JR RA ADDIU V0,R0,0001 LW V0,00E0 (A0) BLEZ V0,80790FD4 ADDIU V0,V0,FFFF SW V0,00E0 (A0) JR RA ADDIU V0,R0,0001 LW V0,00C0 (A0) BLEZ V0,80790FBC ADDIU V0,V0,FFFF SW V0,00C0 (A0) JR RA ADDIU V0,R0,0001 LW V0,00DC (A0) BLEZ V0,80790FD4 ADDIU V0,V0,FFFF SW V0,00DC (A0) JR RA ADDIU V0,R0,0001 JR RA ADDU V0,R0,R0 80790FDC LUI V0,807A LW A0,9E10 (V0) ;A0=80799E10: p->codegen runtime data LW V1,00D8 (A0) ADDIU V0,R0,0001 BNE V1,V0,80791038 NOP LW A2,00E0 (A0) LW A1,00C4 (A0) LW V0,0160 (A0) ADDU V1,A2,A1 ADDIU V0,V0,FFFF SLT V0,V1,V0 BEQ V0,R0,8079107C SLTI V0,A1,000D BEQL V0,R0,8079102C ADDIU V0,A2,0001 ADDIU V0,A1,0001 SW V0,00C4 (A0) JR RA ADDIU V0,R0,0001 SW V0,00E0 (A0) JR RA ADDIU V0,R0,0001 LW A2,00DC (A0) LW A1,00C0 (A0) LW V0,00BC (A0) ADDU V1,A2,A1 ADDIU V0,V0,FFFF SLT V0,V1,V0 BEQ V0,R0,8079107C SLTI V0,A1,000D BEQL V0,R0,80791070 ADDIU V0,A2,0001 ADDIU V0,A1,0001 SW V0,00C0 (A0) JR RA ADDIU V0,R0,0001 SW V0,00DC (A0) JR RA ADDIU V0,R0,0001 JR RA ADDU V0,R0,R0 80791084 ADDIU SP,SP,FFC0 SW RA,0038 (SP) SW S5,0034 (SP) SW S4,0030 (SP) SW S3,002C (SP) SW S2,0028 (SP) SW S1,0024 (SP) JAL 80790B74 ;initialize ??? in codegen runtime data SW S0,0020 (SP) LUI S1,807A LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) ADDIU V1,V0,0164 SW V1,0000 (V0) ADDIU V1,V0,02AC SW V1,00C8 (V0) LW V1,0000 (V0) LW A2,00C8 (V0) ADDIU A1,R0,0001 SW V1,00CC (V0) ADDIU V1,A2,0194 ADDIU A2,A2,0238 SW V1,00D0 (V0) JAL 80790A00 SW A2,00D4 (V0) LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDIU A1,R0,0001 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,00C8 (V0) JAL 80781870 ADDIU S0,R0,0001 JAL 80790F54 ;unconditional return ADDIU S4,R0,FFFF LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data LW V0,00BC (V1) SLTI V0,V0,0065 BNE V0,R0,8079113C ADDU S2,S1,R0 ADDIU V0,R0,0064 SW V0,00BC (V1) LUI V0,807A LW A0,9FD0 (V0) JAL 80790D80 NOP ADDIU S3,R0,0001 LUI V0,807A ADDIU S5,V0,9E20 JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP ADDU S1,V0,R0 LUI V0,0008 AND V0,S1,V0 BEQ V0,R0,8079124C LUI V0,2000 LW A1,9E10 (S2) ;A1=80799E10: p->codegen runtime data LW V0,00D8 (A1) BNE V0,R0,80791198 NOP LW V1,00DC (A1) LW V0,00C0 (A1) ADDU A0,V1,V0 LW V1,00C8 (A1) SLL V0,A0,0x2 ADDU V0,V0,V1 LW V0,0000 (V0) J 80791200 SW V0,00A8 (A1) BNE V0,S3,80791200 NOP LW V1,00E0 (A1) LW V0,00C4 (A1) ADDU A0,V1,V0 SLL V1,A0,0x1 ADDU V1,V1,A0 LW V0,00CC (A1) SLL V1,V1,0x1 ADDU V0,V1,V0 LH A0,0000 (V0) LW V0,00CC (A1) SLL A0,A0,0x10 ADDU V1,V1,V0 SW A0,00A8 (A1) LH V0,0002 (V1) OR A0,A0,V0 LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0010 BNE V1,V0,80791200 SW A0,00A8 (A1) LUI V0,FCFF ORI V0,V0,FFFF AND V0,A0,V0 SW V0,00A8 (A1) JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,0008 JAL 80792438 ;memory editor constructor and interface NOP BEQL V0,S3,80791218 ADDIU S4,R0,0001 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDIU A1,R0,0001 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDIU A1,R0,0001 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790638 ADDU A1,R0,R0 LUI V0,2000 AND V0,S1,V0 BEQ V0,R0,807912A0 LUI V0,0001 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00B4 (V1) BNEL V0,R0,8079126C SW R0,00B4 (V1) SW S3,00B4 (V1) JAL 80792F84 ;unconditional return NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDIU A1,R0,0001 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790638 ADDU A1,R0,R0 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,2000 LUI V0,0001 AND V0,S1,V0 BEQ V0,R0,80791318 LUI V0,0002 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00D8 (V1) BNE V0,S3,80791318 LUI V0,0002 LW V0,00E0 (V1) LW A0,00C4 (V1) JAL 80790C68 ADDU A0,V0,A0 BEQL V0,S3,807912D4 ADDIU S4,R0,0001 JAL 80792F84 ;unconditional return NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDIU A1,R0,0001 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDIU A1,R0,0001 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790638 ADDU A1,R0,R0 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,0008 LUI V0,0002 AND V0,S1,V0 BEQ V0,R0,8079141C NOP LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00D8 (V1) BNE V0,S3,8079141C NOP LW V0,00E0 (V1) LW A0,00C4 (V1) JAL 80790DE4 ;V0=SUCCEEDED/FAILED to remove active code# A0 ADDU A0,V0,A0 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,0160 (V1) BNEL V0,R0,80791378 ADDIU A0,R0,001A ADDU A0,R0,R0 ADDU A1,A0,R0 JAL 80790A00 SW R0,00D8 (V1) LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790A00 ADDU A1,R0,R0 ADDIU A0,R0,001A ADDIU A1,R0,002C ADDIU A2,R0,006C ADDIU A3,R0,0070 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,00BA ADDIU A1,R0,002C ADDIU A2,R0,006C ADDIU A3,R0,0070 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790638 ADDU A1,R0,R0 ADDIU A0,R0,001A ADDIU A1,R0,002C ADDIU A2,R0,006C ADDIU A3,R0,0070 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,00BA ADDIU A1,R0,002C ADDIU A2,R0,006C ADDIU A3,R0,0070 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790638 ADDU A1,R0,R0 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,0002 BGEZ S1,807914FC LUI V0,1000 LW A1,9E10 (S2) ;A1=80799E10: p->codegen runtime data LW V0,00D8 (A1) BNE V0,R0,807914F8 ADDIU S0,R0,0001 LW V0,0160 (A1) SLTI V0,V0,0028 BEQ V0,R0,807914EC NOP LW V1,00DC (A1) LW V0,00C0 (A1) ADDU A0,V1,V0 LW V0,00C8 (A1) SLL S0,A0,0x2 ADDU V0,S0,V0 LW A0,0000 (V0) JAL 80790ECC ;V0=#active code entry matching address and type A0, or -1 if not found NOP ADDIU V1,R0,FFFF BNE V0,V1,807914E0 NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V0,00C8 (V0) ADDU V0,S0,V0 LW A0,0000 (V0) LBU A2,0000 (A0) LBU A1,0001 (A0) SLL V0,A2,0x8 OR A1,A1,V0 LUI V0,8079 LW V1,5980 (V0) ADDIU V0,R0,0008 BEQL V1,V0,807914A8 ADDU A1,A2,R0 ADDIU V0,R0,0010 BNE V1,V0,807914B8 LUI V0,0100 OR A0,A0,V0 JAL 80790B94 ;add active code entry A0.A1 ADDIU S0,R0,0001 ;S0=1 data altered JAL 80790F54 ;unconditional return NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LUI A0,8000 JAL 80792DFC ;wait until buttons/stick state A0 released SW S3,00B8 (V0) J 807914FC LUI V0,1000 LW A0,01A8 (S5) J 807914F0 NOP LW A0,01A4 (S5) JAL 80790D80 ADDIU S0,R0,0001 LUI V0,1000 AND V0,S1,V0 BNEL V0,R0,80791508 ADDIU S4,R0,0001 LUI V0,4000 AND V0,S1,V0 BNEL V0,R0,80791518 ADDU S4,R0,R0 LUI V0,0010 AND V0,S1,V0 BEQ V0,R0,8079154C LUI V0,0020 BNE S0,R0,80791550 AND V0,S1,V0 ADDU S0,R0,R0 JAL 80790FDC ADDIU S0,S0,0001 SLTI V0,S0,000D BNE V0,R0,80791534 LUI V0,0020 ADDIU S0,R0,0001 AND V0,S1,V0 BEQ V0,R0,8079157C LUI V0,0400 BNE S0,R0,80791580 ORI V0,V0,0001 ADDU S0,R0,R0 JAL 80790F5C ADDIU S0,S0,0001 SLTI V0,S0,000D BNE V0,R0,80791564 LUI V0,0400 ADDIU S0,R0,0001 ORI V0,V0,0001 AND V0,S1,V0 BEQ V0,R0,807915A4 LUI V0,0800 BNE S0,R0,807915A8 ORI V0,V0,0002 JAL 80790FDC NOP ADDU S0,V0,R0 LUI V0,0800 ORI V0,V0,0002 AND V0,S1,V0 BEQ V0,R0,807915CC LUI V0,0200 BNE S0,R0,807915D0 ORI V0,V0,0004 JAL 80790F5C NOP ADDU S0,V0,R0 LUI V0,0200 ORI V0,V0,0004 AND V0,S1,V0 BEQ V0,R0,8079161C LUI V0,0100 BNE S0,R0,80791620 ORI V0,V0,0008 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00D8 (V1) BNE V0,S3,8079161C LUI V0,0100 ADDU A0,R0,R0 ADDU A1,A0,R0 JAL 80790A00 SW R0,00D8 (V1) LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDU A1,R0,R0 LW A0,00D8 (V0) JAL 80790A00 ADDIU S0,R0,0001 LUI V0,0100 ORI V0,V0,0008 AND V0,S1,V0 BEQ V0,R0,80791670 NOP BNE S0,R0,80791670 NOP LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,0160 (V1) BLEZ V0,80791670 NOP LW V0,00D8 (V1) BNE V0,R0,80791670 ADDIU A0,R0,0001 ADDU A1,R0,R0 JAL 80790A00 SW S3,00D8 (V1) LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDU A1,R0,R0 LW A0,00D8 (V0) JAL 80790A00 ADDIU S0,R0,0001 JAL 80792F84 ;unconditional return NOP BEQ S0,R0,80791690 NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A0,00D8 (V0) JAL 80790638 ADDU A1,R0,R0 BNE S1,R0,807916A0 NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data SW S3,0074 (V0) LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V0,00B8 (V0) BLEZ V0,807916E4 NOP BNE V0,S3,807916D4 ADDU A0,R0,R0 ADDIU A1,R0,00D8 ADDIU A2,R0,0140 ADDIU A3,R0,0008 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00B8 (V1) ADDIU V0,V0,FFFF SW V0,00B8 (V1) BEQ S0,R0,80791708 ADDU A0,S1,R0 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A2,0074 (V0) JAL 80793298 ;waits until buttons A0 have been held for A1 or released ADDIU A1,R0,0003 LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDU S0,R0,R0 SW R0,0074 (V0) ADDIU V0,R0,FFFF BEQ S4,V0,80791148 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDU V0,S4,R0 LW RA,0038 (SP) LW S5,0034 (SP) LW S4,0030 (SP) LW S3,002C (SP) LW S2,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0040 80791780 V0=TRUE if port initialized ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80787EE0 ;cycle GS activity display, returning V0=value on port or 0 NOP XORI V0,V0,0003 ;V0^=3: test for init.command 3 LW RA,0010 (SP) SLTIU V0,V0,0001 ;V0=TRUE if initialized (V0=3) JR RA ADDIU SP,SP,0018 807917A4 wait for successful handshake ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDIU S0,R0,0047 ;S0=47: 'G' SW S1,0014 (SP) ADDIU S1,R0,0054 ;S1=54: 'T' SW RA,0018 (SP) //807917BC: handshake loop JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,0067 ;A0=67: 'g' BNE V0,S0,807917BC ;loop unless 'G' read NOP JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,0074 ;A0=74: 't' BNE V0,S1,807917BC ;loop unless 'T' read NOP //807917DC: return LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 807917F0 V0=readwrite32(A0) accepts: A0=value ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 SRA A0,S1,0x18 SW RA,0018 (SP) JAL 80787D5C ;V0=readwritebyte(A0) SW S0,0010 (SP) SLL S0,V0,0x18 JAL 80787D5C ;V0=readwritebyte(A0) SRA A0,S1,0x10 SLL V0,V0,0x10 OR S0,S0,V0 JAL 80787D5C ;V0=readwritebyte(A0) SRA A0,S1,0x8 SLL V0,V0,0x8 OR S0,S0,V0 JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,S1,R0 OR V0,S0,V0 LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80791850 V0=read32(0) ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,R0,R0 ;A0=0 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 8079186C redirect to 807917F0 accepts: A0=value ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 807917F0 ;V0=readwrite32(A0) NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80791888 upload or download (A0) dram accepts: A0=mode (0-read;1-write) ADDIU SP,SP,FFC8 SW S8,0030 (SP) ADDU S8,A0,R0 ;S8=A0: mode SW S2,0018 (SP) ADDIU S2,R0,0063 ;S2=63: 'c': init.LCD display SW S4,0020 (SP) ADDU S4,R0,R0 ;S4=0 SW S5,0024 (SP) ADDU S5,S4,R0 ;S5=0 init.LCD.count SW S7,002C (SP) ADDIU S7,R0,0067 ;S7=67: 'g' SW RA,0034 (SP) SW S6,0028 (SP) SW S3,001C (SP) SW S1,0014 (SP) SW S0,0010 (SP) //807918C8: get address and size JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,R0,R0 ;A0=0 ADDU S1,V0,R0 ;S1=V0: address JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,R0,R0 ;A0=0 BEQ S1,R0,807919DC ;quit if NULL address ADDU S3,V0,R0 ;S3=size LUI V0,BDFF ORI V0,V0,FFFF ;V0=BDFFFFFF SLTU V0,V0,S1 ;TRUE if address within GS ROM range BEQ V0,R0,80791908 ;default GS range and above to 80000400 ADDU S0,S1,R0 ;S0=S1: address LUI S0,8000 ORI S0,S0,0400 ;S0=80000400 LUI S1,8000 ORI S1,S1,0400 ;S1=80000400 //80791908: default anything above 80800000 to 80000400 LUI V1,7F88 ADDU V1,S0,V1 ;V1=7F880000+address LUI V0,0008 SLTU V0,V0,V1 ;TRUE if 80000 < 7F880000+address BNE V0,R0,80791928 ;branch if 80000000-80800000 NOP LUI S1,8000 ORI S1,S1,0400 ;S1=80000400 //80791928: mode 0: read BNE S8,R0,80791984 ;branch if mode 1: write NOP BLEZL S3,807919D4 ;loop if size invalid ANDI S4,S4,00FF ADDIU S5,S5,0001 ;S5++ LCD.count ANDI V0,S5,03FF BNE V0,R0,80791960 ;update LCD every 0x400 bytes ADDU A0,S2,R0 ;A0=S2: cur.LCD ADDIU S2,S2,0001 ;S2++ JAL 80780CD0 ;display A0 to LCD screen ANDI A0,A0,00FF ;A0->byte ANDI V0,S2,00FF ;V0=cur.LCD->byte BEQL V0,S7,80791960 ;if cur.LCD is 'g', replace with 'c' ADDIU S2,R0,0063 //80791960: write byte to PC LBU S0,0000 (S1) ;S0=address+offset: data ADDIU S1,S1,0001 ;S1++ address++ ADDIU S3,S3,FFFF ;S3-- size-- JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,S0,R0 ;A0=S0: data BGTZ S3,80791938 ;loop for size ADDU S4,S4,S0 ;S4+=S0: update checksum J 807919D4 ANDI S4,S4,00FF //80791984: mode 1: write BLEZ S3,807919D0 ;quit if size invalid ADDIU S5,S5,0001 ;S5++ LCD.count++ ANDI S6,S5,03FF //80791990: update LCD BNE S6,R0,807919B0 ;update once every 0x400 bytes ADDU A0,S2,R0 ;A0=S2: cur.LCD ADDIU S2,S2,0001 ;S2++ cur.LCD++ JAL 80780CD0 ;display A0 to LCD screen ANDI A0,A0,00FF ;A0->byte ANDI V0,S2,00FF ;V0=cur.LCD->byte BEQL V0,S7,807919B0 ;if cur.LCD 'g', reset to 'c' ADDIU S2,R0,0063 //807919B0: download data to address JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,R0,R0 ;A0=0 ADDU S0,V0,R0 ;S0=V0: data SB S0,0000 (S1) ;S0->address+offset ADDIU S1,S1,0001 ;S1++ address++ ADDIU S3,S3,FFFF ;S3-- size-- BGTZ S3,80791990 ;loop while data remains ADDU S4,S4,S0 ;S4+=S0: update checksum //807919D0: loop for all transfers ANDI S4,S4,00FF ;S4->byte BNE S1,R0,807918C8 ;loop until NULL address NOP //807919DC: send checksum JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,S4,R0 ;A0=S4: checksum //807919E4: return LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80791A14 send active codelist to PC ADDIU SP,SP,FFE0 SW S0,0010 (SP) LUI S0,807A LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data SW RA,001C (SP) SW S2,0018 (SP) SW S1,0014 (SP) LW A0,0160 (V0) ;A0=codegen.runtime+160: #active codes JAL 807917F0 ;V0=readwrite32(A0) ADDU S1,R0,R0 ;S1=0 init.count LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LW V0,0160 (V0) ;V0=codegen.runtime+160: #active codes BLEZ V0,80791A9C ;return if no codes ADDU S2,S0,R0 ;S2=807A0000 ADDU S0,S1,R0 ;S0=S1: 0 //80791A50: LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V0,00CC (V0) ;V0=codegen.runtime+CC: p->active codelist ADDU V0,S0,V0 LHU V1,0000 (V0) ;V1=upper half of code.address LHU A0,0002 (V0) ;A0=lower half of code.address SLL V1,V1,0x10 JAL 807917F0 ;V0=readwrite32(A0) OR A0,A0,V1 ;A0=code.address LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V0,00CC (V0) ;V0=codegen.runtime+CC: p->active codelist ADDU V0,S0,V0 LHU A0,0004 (V0) ;A0=code.data JAL 807917F0 ;V0=readwrite32(A0) ADDIU S1,S1,0001 ;S1++ count++ LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW V0,0160 (V0) ;V0=codegen.runtime+160: #active codes SLT V0,S1,V0 BNE V0,R0,80791A50 ;branch if count < #codes ADDIU S0,S0,0006 ;S0+=6 next code //80791A9C: return LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80791AB4 retrieve and execute PC comms commands ADDIU SP,SP,FFD8 SW S2,0018 (SP) ADDIU S2,R0,0047 ;S2=47: 'G' SW S3,001C (SP) ADDIU S3,R0,0054 ;S3=54: 'T' SW RA,0020 (SP) SW S1,0014 (SP) SW S0,0010 (SP) //80791AD4: test for initialization JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,0067 ;A0=67: 'g' BNE V0,S2,80791AD4 ;loop if not 'G' NOP JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,0074 ;A0=74: 't' BNE V0,S3,80791AD4 ;loop if not 'T' NOP //80791AF4: handle each command type JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,R0,R0 ;A0=0 ADDU V1,V0,R0 ;V1=V0: command from PC ADDIU V0,R0,0069 BEQ V1,V0,80791BC8 ;branch if V1='i': add code SLTI V0,V1,006A BEQ V0,R0,80791B50 ;branch if 'h' or above ADDIU V0,R0,0002 BEQ V1,V0,80791BA8 ;branch if 2: write SLTI V0,V1,0003 BEQ V0,R0,80791B34 ;branch if 3 or above ADDIU V0,R0,0001 BEQ V1,V0,80791B98 ;branch if 1: read NOP J 80791AD4 ;unhandled commands look for reinitialization NOP //80791B34: grab disconnect and end commands ADDIU V0,R0,0064 BEQ V1,V0,80791CC0 ;return if 'd': disconnect ADDIU V0,R0,0065 BEQ V1,V0,80791BB8 ;branch if 'e': end NOP J 80791AD4 ;unhandled commands look for reinitialization NOP //80791B50: ADDIU V0,R0,0070 BEQ V1,V0,80791C98 ;branch if 'p': print codes SLTI V0,V1,0071 BEQ V0,R0,80791B7C ;branch if 'q' or above ADDIU V0,R0,006A BEQ V1,V0,80791C44 ;branch if 'j': #active codes ADDIU V0,R0,006B BEQ V1,V0,80791C60 ;branch if 'k': remove code NOP J 80791AD4 ;unhandled commands look for reinitialization NOP //80791B7C: more commands ADDIU V0,R0,0072 BEQ V1,V0,80791CA8 ;branch if 'r': screenshot ADDIU V0,R0,007F BEQ V1,V0,80791CB8 ;branch if 0x7F: upload NOP J 80791AD4 ;unhandled commands look for reinitialization NOP //80791B98: 1 read JAL 80791888 ;upload or download (A0) dram ADDU A0,R0,R0 ;A0=0: read J 80791AD4 ;jump and reinitialize NOP //80791BA8: 2 write JAL 80791888 ;upload or download (A0) dram ADDIU A0,R0,0001 ;A0=1: write J 80791AD4 ;jump and reinitialize NOP //80791BB8: 0x65 'e' JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,0002 ;A0=2 J 80791CC0 ;return NOP //80791BC8: 0x69 'i' JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,R0,R0 ;A0=0 ADDU A0,R0,R0 ;A0=0 JAL 807917F0 ;V0=readwrite32(A0) ADDU S0,V0,R0 ;S0=V0: code.address LUI V1,807A LW V1,9E10 (V1) ;V1=80799E10: p->codegen runtime data ADDU S1,V0,R0 ;S1=V0: LW V1,0160 (V1) ;V1=codegen.runtime+160: #active.codes ADDIU V0,R0,0028 BNE V1,V0,80791C08 ;branch if not 40 (0x28) NOP JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,00FE ;A0= -2 J 80791AD4 ;jump and reinitialize NOP //80791C08: add code to codelist JAL 80790ECC ;V0=#active code entry matching address and type A0, or -1 if not found ADDU A0,S0,R0 ;A0=S0: code.address ADDIU V1,R0,FFFF ;V1=-1 BNE V0,V1,80791C34 ;branch if code found in list ADDU A0,S0,R0 ;A0=S0: code.address JAL 80790B94 ;add active code entry A0.A1 ADDU A1,S1,R0 ;A1=S1: code.data JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,R0,R0 ;A0=0 J 80791AD4 ;jump and reinitialize NOP //80791C34: return -1 if already found JAL 80787D5C ;V0=readwritebyte(A0) ADDIU A0,R0,00FF ;A0=-1 J 80791AD4 ;jump and reinitialize NOP //80791C44: 0x6A 'j' #active codes LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data LW A0,0160 (V0) ;A0=codegen.runtime+160: #active.codes JAL 80787D5C ;V0=readwritebyte(A0) NOP J 80791AD4 ;jump and reinitialize NOP //80791C60: 0x6B 'k' JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,R0,R0 ;A0=0 LUI A0,FCFF ORI A0,A0,FFFF ;A0=FCFFFFFF: address mask JAL 80790ECC ;V0=#active code entry matching address and type A0, or -1 if not found AND A0,V0,A0 ;A0&=mask: code.address ADDU S1,V0,R0 ;S1=V0: matching active code entry ADDIU V0,R0,FFFF ;V0= -1: entry not found BEQ S1,V0,80791AD4 ;if code entry not found, end command NOP JAL 80790DE4 ;V0=SUCCEEDED/FAILED to remove active code# A0 ADDU A0,S1,R0 ;A0=S1: matching active code entry # J 80791AD4 ;jump and reinitialize NOP //80791C98: 0x70 'p' JAL 80791A14 ;send active codelist to PC NOP J 80791AD4 ;jump and reinitialize NOP //80791CA8: 0x72 'r' screenshot JAL 80794A44 ;capture screenshot with bitdepth 16bits NOP J 80791CC0 ;return NOP //80791CB8: 0x7F upload data JAL 80791CDC ;upload data from N64 to PC as words (0x7F) NOP //80791CC0: return LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80791CDC upload data from N64 to PC as words (0x7F) ADDIU SP,SP,FFD0 SW S2,0018 (SP) ADDIU S2,R0,0063 ;S2=63: 'c': init.LCD display SW S4,0020 (SP) ADDU S4,R0,R0 ;S4=0 SW S5,0024 (SP) ADDU S5,S4,R0 ;S5=0 init.LCD.count ADDU A0,S4,R0 ;A0=0 SW RA,002C (SP) SW S6,0028 (SP) SW S3,001C (SP) SW S1,0014 (SP) JAL 80787DD4 ;V0=readwriteword(A0) SW S0,0010 (SP) ADDU S3,V0,R0 ;S3=V0: address JAL 80787DD4 ;V0=readwriteword(A0) ADDU A0,S4,R0 ;A0=S4: 0 BEQ S3,R0,80791D78 ;quit now if NULL address ADDU S1,V0,R0 ;S1=V0: size BLEZ S1,80791D74 ;return if funky size ADDIU S6,R0,0067 ;S6=67: 'g' //80791D30: update the LCD screen ADDIU S5,S5,0001 ;S5++ LCD.count++ ANDI V0,S5,03FF BNE V0,R0,80791D58 ;only change every 0x400 bytes ADDU A0,S2,R0 ;A0=S2: cur.LCD ADDIU S2,S2,0001 ;S2++ cur.LCD++ JAL 80780CD0 ;display A0 to LCD screen ANDI A0,A0,00FF ;A0->byte ANDI V0,S2,00FF ;V0=S2->byte BEQL V0,S6,80791D58 ;reset S2 to 'c' if 'g' ADDIU S2,R0,0063 //80791D58: upload word to PC LW S0,0000 (S3) ;S0=address+offset: word ADDIU S3,S3,0004 ;S3+=4 next address ADDIU S1,S1,FFFC ;S1-=4: size-=4 JAL 80787DD4 ;V0=readwriteword(A0) ADDU A0,S0,R0 ;A0=S0: word BGTZ S1,80791D30 ;loop for size ADDU S4,S4,S0 ;S4+=S0: checksum //80791D74: checksum->byte ANDI S4,S4,00FF ;S4->byte checksum //80791D78: send checksum JAL 80787D5C ;V0=readwritebyte(A0) ADDU A0,S4,R0 ;A0=S4: checksum //80791D80: return LW RA,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0030 80791DA8 likely data ;SW RA,0014 (SP) ;JAL 80791B60 80791DB0 V0=memory editor address if A0 within range A1-A2; otherwise NULL accepts: A0=address, A1=minimum address, A2=maximum address SLT V0,A0,A1 ;TRUE if A0 below minimum range BNE V0,R0,80791DE8 ;return FALSE if A0 < A1 SLT V0,A0,A2 ;FALSE if A0 above maximum range BEQ V0,R0,80791DE8 ;return FALSE if A2 < A0 LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data SW A2,00AC (V0) ;A2->codegen.runtime+AC: max.address ADDIU A2,A2,FFA0 ;A2-=60: maxmimum range-60 max displayable memory editor address SW A1,00B0 (V0) ;A1->codegen.runtime+B0: min.address SLT V0,A2,A0 BNEL V0,R0,80791DE0 ;if A2codegen runtime data LW V1,015C (A1) ;V1=codegen.runtime+15C: flag... ADDIU V0,R0,0001 BEQ V1,V0,80791E4C ;if set, use original address LUI A0,8000 //80791E2C: force 80000400 as address ORI A0,A0,0400 ;A0=80000400 LUI V1,803F ORI V1,V1,FFFF ;V1=803FFFFF LUI V0,8000 J 80791E5C ORI V0,V0,0400 ;V0=80000400 //80791E4C: use original address ORI A0,A0,0400 ;A0=80000400 LUI V1,803F ORI V1,V1,FFFF ;V1=803FFFFF ADDU V0,S0,R0 ;V0=S0: mem.edit address //80791E5C: SW A0,00B0 (A1) ;A0->codegen.runtime+B0: min.address SW V1,00AC (A1) ;V1->codegen.runtime+AC: max.address //80791E64: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80791E74 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data ADDU A3,A0,R0 LW A2,0098 (V1) LW A1,0090 (V1) LW V0,009C (V1) LW V1,00A0 (V1) SRA A0,A2,0x1 ADDU A1,A1,A0 SLL V0,V0,0x3 BNE V1,R0,80791EE4 ADDU A1,A1,V0 LBU V1,0000 (A1) ANDI A0,A2,0001 BEQL A0,R0,80791EB4 SRL V1,V1,0x4 BNE A0,R0,80791ED4 ADDU V1,V1,A3 LBU V0,0000 (A1) SLL V1,V1,0x4 ANDI V0,V0,000F OR V0,V0,V1 JR RA SB V0,0000 (A1) LBU V0,0000 (A1) ANDI V1,V1,000F J 80791EC8 ANDI V0,V0,00F0 LBU V0,0000 (A1) ADDU V0,V0,A3 JR RA SB V0,0000 (A1) 80791EF4 ADDIU SP,SP,FFD0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW RA,0028 (SP) SW S1,0024 (SP) SW S0,0020 (SP) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDU A0,R0,R0 ADDIU A1,R0,001A LUI S1,807A ADDIU S1,S1,9E20 LW A3,0058 (S1) ADDIU A2,R0,0024 JAL 8078EF90 SW R0,0010 (SP) ADDU A0,R0,R0 ADDIU A1,R0,0026 ADDIU A2,R0,0140 ADDIU A3,R0,0001 ADDIU S0,R0,00C8 SW S0,0010 (SP) SW S0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW S0,0018 (SP) ADDU A0,R0,R0 ADDIU A1,R0,0089 ADDIU A2,R0,0140 ADDIU A3,R0,0001 SW S0,0010 (SP) SW S0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW S0,0018 (SP) ADDIU A0,R0,0098 LUI A2,FFFE LW A1,0060 (S1) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00A2 LUI A2,FFFE LW A1,0064 (S1) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,R0,00AC LUI A2,FFFE LW A1,0068 (S1) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LW RA,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0030 80791FE0 ADDIU SP,SP,FFA0 SW S8,0058 (SP) ADDU S8,R0,R0 ADDU A0,S8,R0 ADDIU A1,R0,0027 ADDIU A2,R0,0140 ADDIU A3,R0,0062 ADDIU V0,R0,003C SW RA,005C (SP) SW S7,0054 (SP) SW S6,0050 (SP) SW S5,004C (SP) SW S4,0048 (SP) SW S3,0044 (SP) SW S2,0040 (SP) SW S1,003C (SP) SW S0,0038 (SP) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW V0,0018 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP LUI V0,807A LW V0,9E10 (V0) ;V0=80799E10: p->codegen runtime data ADDIU S2,SP,0026 LW A0,0094 (V0) LW V0,0090 (V0) ADDIU V1,R0,0002 BEQ A0,V1,8079207C SW V0,0034 (SP) SLTI V0,A0,0003 BNEL V0,R0,80792084 SW R0,0030 (SP) ADDIU V0,R0,0004 BEQL A0,V0,80792080 ADDIU S2,SP,0020 J 80792084 SW R0,0030 (SP) ADDIU S2,SP,0024 SW R0,0030 (SP) ADDIU S0,R0,0028 ADDU S7,R0,R0 LUI S6,807A LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data ADDIU A1,SP,0020 LW V0,0090 (V0) SLL A0,S7,0x3 JAL 80793534 ;sprintf(A1,"%08d",A0) ADDU A0,V0,A0 ADDIU A0,R0,000A ADDU A1,S0,R0 ADDIU A2,SP,0020 LUI A3,7BDE JAL 80792BF8 ORI A3,A3,7BDE ADDIU A0,R0,004A ADDU A1,S0,R0 LUI A2,8079 ADDIU A2,A2,58E0 LUI A3,7BDE JAL 80792BF8 ORI A3,A3,7BDE LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data ADDU S5,R0,R0 LW V0,0094 (V0) ADDIU S3,R0,0052 SLL V0,V0,0x7 ORI S4,V0,0076 LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data LW V0,0094 (V0) ADDIU T0,R0,0001 BNE V0,T0,80792138 NOP LW T1,0034 (SP) LW T0,0030 (SP) ADDU V0,T1,T0 LBU S8,0000 (V0) ADDIU V0,S8,FFE0 SLTIU V0,V0,005B BEQ V0,R0,80792130 SB R0,0021 (SP) J 80792138 SB S8,0020 (SP) ADDIU V0,R0,0020 SB V0,0020 (SP) LW V1,9E10 (S6) ;V1=80799E10: p->codegen runtime data LW V0,0098 (V1) SRA V0,V0,0x1 BNE V0,S5,80792158 ADDU S1,R0,R0 LW V0,009C (V1) XOR V0,V0,S7 SLTIU S1,V0,0001 BEQ S1,R0,807921B4 ADDU A0,S4,R0 ADDU A1,S0,R0 ADDIU A3,R0,0008 LW A2,0094 (V1) ADDIU T1,R0,000A ADDU T0,T1,R0 SW T1,0010 (SP) ADDIU T1,R0,008C SW T0,0014 (SP) SW T1,0018 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SLL A2,A2,0x3 LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data LW V0,00A0 (V0) ADDIU T0,R0,0001 BNE V0,T0,807921B4 ADDU A0,S4,R0 ADDU A1,S0,R0 ADDIU A2,SP,0020 LUI A3,FFFE J 807921C4 ORI A3,A3,FFFE ADDU A1,S0,R0 ADDIU A2,SP,0020 LUI A3,7BDE ORI A3,A3,7BDE JAL 80792BF8 NOP ADDU A0,S8,R0 LW T1,0030 (SP) LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data ADDIU T1,T1,0001 SW T1,0030 (SP) LW V0,0094 (V0) ADDIU A1,SP,0020 SLL V0,V0,0x3 JAL 80793534 ;sprintf(A1,"%08d",A0) ADDU S4,S4,V0 BEQ S1,R0,8079222C ADDU A0,S3,R0 ADDU A1,S0,R0 LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data ADDIU A3,R0,0008 LW A2,0094 (V0) ADDIU T0,R0,000A ADDU T1,T0,R0 SW T0,0010 (SP) ADDIU T0,R0,008C SW T1,0014 (SP) SW T0,0018 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SLL A2,A2,0x4 ADDU A0,S3,R0 ADDU A1,S0,R0 ADDU A2,S2,R0 LUI A3,7BDE JAL 80792BF8 ORI A3,A3,7BDE ADDIU T1,R0,0001 BNE S1,T1,807922B0 NOP LW V1,9E10 (S6) ;V1=80799E10: p->codegen runtime data LW V0,00A0 (V1) BNE V0,R0,807922B0 NOP LW V0,0098 (V1) AND V0,V0,T1 BEQ V0,R0,80792294 ADDIU A0,S3,0008 ADDU S2,S2,T1 SB R0,0001 (S2) ADDU A1,S0,R0 ADDU A2,S2,R0 LUI A3,FFFE JAL 80792BF8 ORI A3,A3,FFFE J 807922B0 ADDIU S2,S2,FFFF SB R0,0001 (S2) ADDU A0,S3,R0 ADDU A1,S0,R0 ADDU A2,S2,R0 LUI A3,FFFE JAL 80792BF8 ORI A3,A3,FFFE LW V0,9E10 (S6) ;V0=80799E10: p->codegen runtime data LW V1,0094 (V0) ADDIU A0,S3,0004 SLL V0,V1,0x4 ADDU S3,A0,V0 ADDU S5,S5,V1 SLTI V0,S5,0008 BNE V0,R0,807920F4 NOP ADDIU S7,S7,0001 SLTI V0,S7,000C BNE V0,R0,80792090 ADDIU S0,S0,0008 JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LW RA,005C (SP) LW S8,0058 (SP) LW S7,0054 (SP) LW S6,0050 (SP) LW S5,004C (SP) LW S4,0048 (SP) LW S3,0044 (SP) LW S2,0040 (SP) LW S1,003C (SP) LW S0,0038 (SP) JR RA ADDIU SP,SP,0060 8079231C BNE A0,R0,80792344 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW A0,0090 (V1) LW V0,00B0 (V1) SLT V0,V0,A0 BEQ V0,R0,80792364 ADDIU V0,A0,FFF8 JR RA SW V0,0090 (V1) LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW V0,00AC (V1) LW A0,0090 (V1) ADDIU V0,V0,FFA0 SLT V0,A0,V0 BEQ V0,R0,80792364 ADDIU V0,A0,0008 SW V0,0090 (V1) JR RA NOP 8079236C ADDIU SP,SP,FFC0 SW S0,0030 (SP) ADDU S0,A0,R0 SW S1,0034 (SP) ADDU S1,A1,R0 BNE A2,R0,807923A8 SW RA,0038 (SP) ADDIU A0,R0,002A ADDIU A1,R0,0030 ADDIU A2,R0,00EC ADDIU A3,R0,004B SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A0,R0,0024 ADDIU A1,R0,002C ADDIU A2,R0,001A ADDIU A3,R0,0004 SW R0,0010 (SP) SW S0,0014 (SP) JAL 8078F11C SW S1,0018 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP ADDIU A0,R0,0024 ADDIU A1,R0,002C ADDIU A2,R0,001A LUI V0,807A ADDIU V0,V0,9E20 LW V1,0070 (V0) LW T0,0074 (V0) LW T1,01B8 (V0) LW T2,0078 (V0) LW V0,0004 (V0) ADDIU A3,R0,0005 SW S0,0010 (SP) SW S1,0014 (SP) SW V1,0018 (SP) SW T0,001C (SP) SW T1,0020 (SP) SW T2,0024 (SP) JAL 80793A34 SW V0,0028 (SP) JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP LW RA,0038 (SP) LW S1,0034 (SP) LW S0,0030 (SP) JR RA ADDIU SP,SP,0040 80792438 memory editor constructor and interface ADDIU SP,SP,FFC8 SW RA,0034 (SP) SW S4,0030 (SP) SW S3,002C (SP) SW S2,0028 (SP) SW S1,0024 (SP) JAL 80791EF4 SW S0,0020 (SP) JAL 80791EF4 LUI S1,807A LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data ADDU S3,R0,R0 ;S3=0 deactivate got address box LW V0,0090 (V1) ;V0=codegen.runtime+90: cur.mem.edit.addy BNE V0,R0,807924B0 ;branch if address set ADDU S0,S3,R0 ;S0=S3: 0 LW V0,00A8 (V1) ;V0=codegen.runtime+A8: goto.addy LUI A0,8001 BNE V0,R0,80792488 ;branch if set SW A0,0090 (V1) ;80010000->codegen.runtime+90: cur.mem.edit.addy SW A0,00A8 (V1) ;80010000->codegen.runtime+A8: goto.addy //80792488: set a valid current memory editor address LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,0090 (V0) ;A0=codegen.runtime+90: cur.mem.edit.addy ADDIU V1,R0,0001 SW V1,0094 (V0) ;1->codegen.runtime+94: SW R0,0098 (V0) ;0->codegen.runtime+98: cur.nibble SW R0,009C (V0) ;0->codegen.runtime+9C: cur.row JAL 80791DF0 ;V0=final memory editor address SW R0,00A0 (V0) ;0->codegen.runtime+A0: nibble mode LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data SW V0,0090 (V1) ;V0->codegen.runtime+90: cur.mem.edit.addy //807924B0: look at controller input LUI S2,807A ADDIU S4,R0,0001 ;S4=1 //807924B8: loop to grab controller input JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP LUI V1,0800 ORI V1,V1,0002 ;V1=08000002: + up, stick up ADDU S1,V0,R0 ;S1=V0: buttons/stick AND V1,S1,V1 ;V1=nonzero if up pressed BEQ V1,R0,80792500 ;branch if up not pressed LUI V0,0400 //807924D8: up pressed LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,009C (V1) ;V0=codegen.runtime+9C: cur.row BLEZ V0,807924F0 ;if top row, will need to be careful ADDIU V0,V0,FFFF ;V0-- cur.row-- J 807924F8 SW V0,009C (V1) ;V0->codegen.runtime+9C: update cur.row //807924F0: up on top row JAL 8079231C ADDU A0,R0,R0 ;A0=0 ADDIU S0,R0,0001 ;S0=1 //807924FC: test if down pressed LUI V0,0400 ORI V0,V0,0001 ;V0=04000001: + down, stick down AND V0,S1,V0 ;V0=nonzero if down pressed BEQ V0,R0,8079253C ;skip if down not pressed LUI V0,0200 LW A0,9E10 (S2) ;A0=80799E10: p->codegen runtime data LW V1,009C (A0) ;V1=codegen.runtime+9C: cur.row SLTI V0,V1,000B BEQ V0,R0,8079252C ;more complicated if row 10... ADDIU V0,V1,0001 ;V0=V1+1: cur.row++ J 80792534 SW V0,009C (A0) ;V0->codegen.runtime+9C: update cur.row //8079252C: down on bottom row JAL 8079231C ADDIU A0,R0,0001 ;A0=1 ADDIU S0,R0,0001 ;S0=1 //80792538: test if left pressed LUI V0,0200 ORI V0,V0,0004 ;V0=02000004: + left, stick left AND V0,S1,V0 ;V0=nonzero if left pressed BEQ V0,R0,80792588 ;branch if left not pressed LUI V0,0100 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,0098 (V1) ;V0=codegen.runtime+98: cur.nibble BLEZ V0,80792568 ;don't alter if on left column ADDIU S0,R0,0001 ;S0=1 ADDIU V0,V0,FFFF ;V0-- cur.nibble-- SW V0,0098 (V1) ;V0->codegen.runtime+98: update cur.nibble LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data //80792568: account for byte mode LW V0,00A0 (V1) ;V0=codegen.runtime+A0: mode BNE V0,S0,80792588 ;branch if in nibble mode (0) LUI V0,0100 LW V0,0098 (V1) ;V0=codegen.runtime+98: cur.nibble BLEZ V0,80792584 ADDIU V0,V0,FFFF ;V0-- cur.nibble-- SW V0,0098 (V1) ;V0->codegen.runtime+98: update cur.nibble //80792584: test if right pressed LUI V0,0100 ORI V0,V0,0008 ;V0=01000008: + right, stick right AND V0,S1,V0 ;V0=nonzero if right pressed BEQ V0,R0,807925DC ;branch if right not pressed LUI V0,2000 LW A0,9E10 (S2) ;A0=80799E10: p->codegen runtime data LW V1,0098 (A0) ;V1=codegen.runtime+98: cur.nibble SLTI V0,V1,000F BEQ V0,R0,807925B4 ;don't alter if on right column ADDIU S0,R0,0001 ;S0=1 ADDU V0,V1,S0 ;V0=V1+1: cur.nibble++ SW V0,0098 (A0) ;V0->codegen.runtime+98: update cur.nibble //807925B4: account for byte mode LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00A0 (V1) ;V0=codegen.runtime+A0: mode BNE V0,S0,807925DC ;branch if nibble mode (0) LUI V0,2000 LW A0,0098 (V1) ;A0=codegen.runtime+98: cur.nibble SLTI V0,A0,000F BEQ V0,R0,807925D8 ;don't alter if on right column ADDIU V0,A0,0001 ;V0=A0+1 cur.nibble++ SW V0,0098 (V1) ;V0->codegen.runtime+98: update cur.nibble //807925D8: test if Z pressed LUI V0,2000 AND V0,S1,V0 ;V0=nonzero if pressed BEQ V0,R0,80792604 ;branch if Z not pressed LUI V0,0020 LW V1,9E10 (S2) ;V1=80799E10: p->codegen runtime data LW V0,00A0 (V1) ;V0=codegen.runtime+A0: mode BNEL V0,R0,807925FC ;if mode=1, reset to 0 SW R0,00A0 (V1) SW S4,00A0 (V1) ;1->codegen.runtime+A0: byte mode ADDIU S0,R0,0001 ;S0=1 //80792600: test if L pressed LUI V0,0020 AND V0,S1,V0 ;V0=nonzero if L pressed BEQ V0,R0,80792630 ;branch if L not pressed LUI V0,0010 ADDU S0,R0,R0 ;S0=0 init.count //80792614: backtrack 12 rows JAL 8079231C ADDU A0,R0,R0 ;A0=0 ADDIU S0,S0,0001 ;S0++ count++ SLTI V0,S0,000C BNE V0,R0,80792614 ;loop for 12 rows LUI V0,0010 ADDIU S0,R0,0001 ;S0=1 //80792630: test if R pressed AND V0,S1,V0 ;V0=nonzero if R pressed BEQ V0,R0,8079265C ;branch if not pressed LUI V0,1000 ADDU S0,R0,R0 ;S0=0 init.count //80792640: advance 12 rows JAL 8079231C ADDIU A0,R0,0001 ;A0=1 ADDIU S0,S0,0001 ;S0++ count++ SLTI V0,S0,000C BNE V0,R0,80792640 ;loop for 12 rows LUI V0,1000 ADDIU S0,R0,0001 ;S0=1 //8079265C: test if Start pressed AND V0,S1,V0 ;V0=nonzero if Start pressed BNE V0,R0,8079277C ;return if Start pressed ADDIU V0,R0,0001 //80792668: test if B pressed LUI V0,4000 AND V0,S1,V0 ;V0=nonzero if B pressed BEQ V0,R0,80792688 ;branch if not pressed LUI V0,0008 ADDIU S3,R0,0001 ;S3=1: activate goto address box JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,4000 ;A0=B button //80792684: test if C up pressed LUI V0,0008 AND V0,S1,V0 ;V0=nonzero if C up pressed BEQ V0,R0,807926A4 ;branch if not pressed LUI V0,0004 JAL 80791E74 ADDIU A0,R0,0001 ;A0=1 ADDIU S0,R0,0001 ;S0=1 //807926A0: test if C down pressed LUI V0,0004 AND V0,S1,V0 ;V0=nonzero if C down pressed BEQ V0,R0,807926BC ;branch if not pressed NOP JAL 80791E74 ADDIU A0,R0,FFFF ;A0=-1 ADDIU S0,R0,0001 ;S0=1 //807926BC: test if A pressed BGEZ S1,807926E4 ;branch if A not pressed NOP JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 ;A0=A button JAL 8079279C NOP BEQ V0,S4,8079277C ;return if V0=1 ADDIU V0,R0,0001 ;V0=1 JAL 80791EF4 NOP //807926E4: refresh screen BNE S3,R0,80792734 ;branch if got address box activated ADDU A0,R0,R0 ;A0=0 JAL 80785460 ;wait until video refresh NOP JAL 80791FE0 NOP BNE S1,R0,8079270C ;branch if buttons pressed NOP LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data SW S4,0074 (V0) ;1->codegen.runtime+74: //8079270C: set held button repeat delay BEQ S0,R0,807924B8 ;loop if nothing changed ADDU A0,S1,R0 ;A0=S1: buttons/stick LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data LW A2,0074 (V0) ;A2=codegen.runtime+74: JAL 80793298 ;waits until buttons A0 have been held for A1 or released ADDIU A1,R0,0003 ;A1=3 seconds LW V0,9E10 (S2) ;V0=80799E10: p->codegen runtime data ADDU S0,R0,R0 ;S0=0 J 807924B8 ;loop SW R0,0074 (V0) ;0->codegen.runtime+74: no extra increment //80792734: fill both screen buffers with black ADDU A1,A0,R0 ;A1=A0: 0 ADDIU A2,R0,0140 ;A2=140 ADDIU A3,R0,00F0 ;A3=F0 SW R0,0010 (SP) ;SP+10=0 black SW R0,0014 (SP) ;SP+14=0 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;SP+18=0 JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP ADDU A0,R0,R0 ;A0=0 ADDU A1,A0,R0 ;A1=0 ADDIU A2,R0,0140 ;A2=140 ADDIU A3,R0,00F0 ;A3=F0 SW R0,0010 (SP) ;SP+10=0 black SW R0,0014 (SP) ;SP+14=0 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;SP+18=0 ADDU V0,R0,R0 ;V0=0 //8079277C: return LW RA,0034 (SP) LW S4,0030 (SP) LW S3,002C (SP) LW S2,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0038 8079279C ADDIU SP,SP,FFB0 SW S5,003C (SP) ADDU S5,R0,R0 SW S2,0030 (SP) ADDU S2,S5,R0 SW S7,0044 (SP) ADDU S7,S5,R0 SW S1,002C (SP) LUI S1,807A SW S4,0038 (SP) ADDIU S4,R0,0002 SW S3,0034 (SP) LUI S3,4000 LUI V0,807A SW S6,0040 (SP) ADDIU S6,V0,9E20 SW RA,0048 (SP) SW S0,0028 (SP) JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP ADDU S0,V0,R0 LUI V0,0800 ORI V0,V0,0002 AND V0,S0,V0 BEQ V0,R0,80792820 LUI V0,0400 LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data LW V0,00A4 (V1) BLEZ V0,8079281C ADDIU V0,V0,FFFF SW V0,00A4 (V1) ADDIU S2,R0,0001 LUI V0,0400 ORI V0,V0,0001 AND V0,S0,V0 BEQ V0,R0,80792850 LUI V0,1000 LW A0,9E10 (S1) ;A0=80799E10: p->codegen runtime data LW V1,00A4 (A0) SLTI V0,V1,0003 BEQ V0,R0,8079284C ADDIU V0,V1,0001 SW V0,00A4 (A0) ADDIU S2,R0,0001 LUI V0,1000 AND V0,S0,V0 BEQ V0,R0,8079286C AND V0,S0,S3 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LUI S0,8000 SW S4,00A4 (V0) AND V0,S0,S3 BEQ V0,R0,8079287C NOP LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data SW S4,00A4 (V0) BGEZ S0,80792ADC ADDIU A1,R0,0001 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,00A4 (V0) JAL 8079236C ADDU A2,A1,R0 JAL 807930F0 ;wait for A0 vsyncs ADDIU A0,R0,000C JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW V1,00A4 (V0) ADDIU V0,R0,0001 BEQ V1,V0,80792968 SLTI V0,V1,0002 BEQ V0,R0,807928D0 NOP BEQ V1,R0,807928E8 NOP J 80792ADC NOP BEQ V1,S4,80792AAC ADDIU V0,R0,0003 BEQ V1,V0,80792AC4 NOP J 80792ADC NOP JAL 80791FE0 NOP JAL 80793B5C ADDIU A0,R0,0098 ADDIU A1,R0,0064 ADDIU A2,R0,0044 ADDIU V0,R0,0020 LW A0,0074 (S6) LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data ADDIU A3,R0,0010 SW V0,0010 (SP) LW V1,00A8 (V1) ADDU V0,SP,V0 SW R0,0018 (SP) SW V0,001C (SP) JAL 807942EC SW V1,0014 (SP) LW A1,9E10 (S1) ;A1=80799E10: p->codegen runtime data LW V1,0020 (SP) BNE V1,R0,80792A84 SW V0,00A8 (A1) SW V0,0090 (A1) ANDI V0,V0,0007 SW V0,0098 (A1) ADDU A0,V0,R0 LW V1,0090 (A1) SLL A0,A0,0x1 SW R0,009C (A1) SW A0,0098 (A1) SUBU V1,V1,V0 J 80792A84 SW V1,0090 (A1) JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP BNE V0,R0,80792968 NOP JAL 80791FE0 NOP ADDIU A1,R0,004C ADDIU A2,R0,0044 ADDIU A3,R0,0010 LW A0,01B8 (S6) LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data ADDIU V1,SP,0020 SW V1,0014 (SP) ADDIU V0,V0,0134 JAL 80781980 SW V0,0010 (SP) ADDU A0,R0,R0 ADDIU A1,R0,00C8 ADDIU A2,R0,0140 LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data ADDIU A3,R0,0028 SW V0,0118 (V1) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 80791FE0 NOP ADDU A0,R0,R0 ADDIU A1,R0,00C8 ADDIU A2,R0,0140 ADDIU A3,R0,0028 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data LW V0,0118 (V1) BEQ V0,R0,80792A10 ADDIU A0,R0,00C8 J 80792A48 SW V0,00A8 (V1) LW A1,01C0 (S6) LUI A2,FFFE JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP BNE V0,S3,80792A28 NOP JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP BEQ V0,S3,80792A38 NOP LW V0,0020 (SP) BNE V0,R0,80792A5C NOP JAL 80792B84 NOP JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP ADDU A0,R0,R0 ADDIU A1,R0,00C8 ADDIU A2,R0,0140 ADDIU A3,R0,0028 SW R0,0010 (SP) ;SP+10=0 black SW R0,0014 (SP) ;SP+14=0 JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ;SP+18=0 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A0,0090 (V0) JAL 80791DF0 ;V0=final memory editor address NOP LW V1,0020 (SP) LW A0,9E10 (S1) ;A0=80799E10: p->codegen runtime data XORI V1,V1,0002 SW V0,0090 (A0) J 80792B58 SLTIU V0,V1,0001 JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP BNE V0,R0,80792AAC ADDU V0,R0,R0 J 80792B58 NOP JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP BNE V0,R0,80792AC4 ADDIU V0,R0,0001 J 80792B58 NOP BNE S5,R0,80792B58 ADDU V0,R0,R0 JAL 80785460 ;wait until video refresh NOP ADDU V1,R0,R0 LUI A0,0002 ORI A0,A0,980F ADDIU V1,V1,0001 SLT V0,A0,V1 BEQ V0,R0,80792AFC ADDIU V1,V1,0001 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data ADDU A1,R0,R0 LW A0,00A4 (V0) JAL 8079236C ADDU A2,S7,R0 BNE S0,R0,80792B2C ADDIU V0,R0,0001 LW V1,9E10 (S1) ;V1=80799E10: p->codegen runtime data SW V0,0074 (V1) BEQ S2,R0,80792B50 ADDU A0,S0,R0 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data LW A2,0074 (V0) JAL 80793298 ;waits until buttons A0 have been held for A1 or released ADDIU A1,R0,0003 LW V0,9E10 (S1) ;V0=80799E10: p->codegen runtime data ADDU S2,R0,R0 SW R0,0074 (V0) BEQ S5,R0,807927E4 ADDU V0,R0,R0 LW RA,0048 (SP) LW S7,0044 (SP) LW S6,0040 (SP) LW S5,003C (SP) LW S4,0038 (SP) LW S3,0034 (SP) LW S2,0030 (SP) LW S1,002C (SP) LW S0,0028 (SP) JR RA ADDIU SP,SP,0050 80792B84 LUI V0,807A LW V1,9E10 (V0) ;V1=80799E10: p->codegen runtime data LW A1,00A8 (V1) SW R0,009C (V1) SW A1,0090 (V1) ANDI A1,A1,0007 SW A1,0098 (V1) ADDU A0,A1,R0 LW V0,0090 (V1) SLL A0,A0,0x1 SW A0,0098 (V1) SUBU V0,V0,A1 JR RA SW V0,0090 (V1) 80792BBC likely data ;ADDU V0,V0,S0 80792BC0 redirect to 80785EB8 ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80785EB8 ;V0=controller 1 buttons/stick state NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80792BDC redirect to 8078601C ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 8078601C ;V0=controller 1 button/stick state NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80792BF8 ADDIU SP,SP,FFE8 LUI V0,807A SW A1,B330 (V0) LUI V0,807A LW V0,B254 (V0) LUI V1,807A SW RA,0010 (SP) SW A3,B250 (V1) SRL V1,V0,0x1F ADDU V0,V0,V1 SRA V0,V0,0x1 ADDU A0,A0,V0 LUI V0,807A SW A0,B32C (V0) JAL 8078554C ;display string A0 using current display settings; 80-83 special ADDU A0,A2,R0 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80792C44 LUI A2,000F ORI A2,A2,4240 BNE A0,R0,80792C74 ADDU A3,R0,R0 LUI V0,8079 ADDIU T6,V0,58F0 LB T3,0000 (T6) LB T4,0001 (T6) SB T3,0000 (A1) SB T4,0001 (A1) JR RA NOP ADDIU T2,R0,0001 ADDIU T1,R0,0030 LUI T0,6666 ORI T0,T0,6667 SLT V0,A0,A2 BNE V0,R0,80792CE4 NOP DIV A0,A2 BNE A2,R0,80792CA0 NOP BREAK 00001C00 ADDIU AT,R0,FFFF BNE A2,AT,80792CB8 LUI AT,8000 BNE A0,AT,80792CB8 NOP BREAK 00001800 MFLO V0 NOP NOP MULT V0,A2 ADDIU A3,R0,0001 ADDIU V0,V0,0030 SB V0,0000 (A1) ADDU A1,A1,A3 MFLO V1 J 80792CF8 SUBU A0,A0,V1 MULT A2,T0 BNE A3,T2,80792CFC NOP SB T1,0000 (A1) ADDIU A1,A1,0001 MULT A2,T0 SRA V0,A2,0x1F MFHI T3 SRA V1,T3,0x2 SUBU A2,V1,V0 BGTZ A2,80792C88 SLT V0,A0,A2 JR RA SB R0,0000 (A1) 80792D1C ADDIU SP,SP,FFD8 SW S2,0018 (SP) ADDU S2,A0,R0 SW S1,0014 (SP) ADDU S1,A1,R0 SW S3,001C (SP) ADDU S3,A2,R0 SW S0,0010 (SP) ADDU S0,A3,R0 SW RA,0020 (SP) JAL 807900A0 ;strlen(A0) ADDU A0,S1,R0 LUI V1,807A SLL V0,V0,0x3 SRA V0,V0,0x1 ADDU A1,S2,S0 ADDU A2,S1,R0 LW A0,A144 (V1) ADDU A3,S3,R0 ADDIU A0,A0,00A0 SUBU A0,A0,V0 JAL 80792BF8 ADDU A0,A0,S0 LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80792D94 ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 SW S0,0010 (SP) ADDU S0,A1,R0 SW S2,0018 (SP) ADDU S2,A2,R0 SW RA,001C (SP) JAL 807900A0 ;strlen(A0) ADDU A0,S0,R0 LUI V1,807A SLL V0,V0,0x3 SRA V0,V0,0x1 ADDU A1,S1,R0 ADDU A2,S0,R0 LW A0,A144 (V1) ADDU A3,S2,R0 ADDIU A0,A0,00A0 JAL 80792BF8 SUBU A0,A0,V0 LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80792DFC wait until buttons/stick state A0 released A0=button/stick mask ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: button/stick mask SW RA,0014 (SP) //80792E0C: JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP AND V0,V0,S0 ;V0&=S0: nonzero if buttons pressed BEQ V0,R0,80792E30 ;return when buttons released NOP JAL 80785460 ;wait until video refresh NOP J 80792E0C NOP //80792E30: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80792E40 ADDIU SP,SP,FFA0 SW S0,0048 (SP) ADDU S0,A0,R0 SW S1,004C (SP) ADDU S1,A1,R0 SW S2,0050 (SP) ADDU S2,A2,R0 SW S3,0054 (SP) ADDU S3,A3,R0 SW RA,0058 (SP) JAL 80792C44 ADDIU A1,SP,0010 ADDIU A0,SP,0010 LUI A1,8079 JAL 80792F3C ADDIU A1,A1,58F4 ADDIU V0,R0,0001 BNE S0,V0,80792E90 ADDU A1,S1,R0 ADDU A1,S2,R0 JAL 80792F3C ADDIU A0,SP,0010 ADDU A0,S3,R0 LW A2,0070 (SP) LW A3,0074 (SP) JAL 80792D1C ADDIU A1,SP,0010 LW RA,0058 (SP) LW S3,0054 (SP) LW S2,0050 (SP) LW S1,004C (SP) LW S0,0048 (SP) JR RA ADDIU SP,SP,0060 80792EC8 returns 0 if strings A0 and A1 match accepts: A0=p->search string, A1=p->string LBU V0,0000 (A0) ;V0=s.char BNE V0,R0,80792EE0 ;branch if not NULL terminator NOP LBU V0,0000 (A1) ;V1=t.char BEQ V0,R0,80792F0C ;return if both strings at NULL NOP //80792EE0: test if chars match LBU V1,0000 (A0) ;V1=s.char LBU V0,0000 (A1) ;V0=t.char BEQ V1,V0,80792EF8 ;branch if match ADDIU A0,A0,0001 ;A0++ p->next s.char //80792EF0: return DIFFER JR RA ADDIU V0,R0,0001 //80792EF8: LBU V0,0000 (A0) ;V0=s.char BNE V0,R0,80792EE0 ;loop until string end NOP BNE V1,R0,80792EE0 ;loop if a substring, which forces a DIFFER NOP //80792F0C: return MATCH JR RA ADDU V0,R0,R0 80792F14 strcpy(A0,A1) accepts: A0=p->target, A1=p->source LBU V1,0000 (A1) ;V1=source BEQ V1,R0,80792F34 ADDU V0,A0,R0 ;V0=A0: p->target //80792F20: ADDIU A1,A1,0001 ;A1++ source++ SB V1,0000 (V0) ;V1->target LBU V1,0000 (A1) ;V1=source BNE V1,R0,80792F20 ;loop until NULL ADDIU V0,V0,0001 ;V0++ target++ //80792F34: return JR RA SB R0,0000 (V0) ;0->target: NULL terminate 80792F3C LBU V0,0000 (A0) BEQ V0,R0,80792F58 NOP ADDIU A0,A0,0001 LBU V0,0000 (A0) BNEL V0,R0,80792F4C ADDIU A0,A0,0001 LBU V0,0000 (A1) BEQL V0,R0,80792F7C SB R0,0000 (A0) ADDIU A1,A1,0001 SB V0,0000 (A0) LBU V0,0000 (A1) BNE V0,R0,80792F64 ADDIU A0,A0,0001 SB R0,0000 (A0) JR RA ADDU V0,A0,R0 80792F84 unconditional return JR RA NOP 80792F8C display and swap video buffers, then invalidate cache ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 807854B4 ;display and swap video buffers NOP JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80792FB0 ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 SW S0,0010 (SP) ADDU S0,A1,R0 SW RA,0018 (SP) JAL 80785EB8 ;V0=controller 1 buttons/stick state NOP AND V0,V0,S1 BEQ V0,R0,80792FF4 NOP BEQ S0,R0,80792FC8 NOP JALR RA,S0 ADDU A0,R0,R0 J 80792FC8 NOP LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80793008 execute function A3 A1 times accepts: A0=unused, A1=count, A2=nonzero increments count by 15, A3=p->function ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A1,R0 ;S0=A1: count SW S1,0014 (SP) ADDU S1,A3,R0 ;S1=A3: p->function BEQ A2,R0,80793028 ;if zero, don't add 15 by default SW RA,0018 (SP) ADDIU S0,S0,000F ;S0+=F: count+=15 //80793028: return if no count BEQ S0,R0,80793048 ;return if count 0 NOP //80793030: run routine A3 A1 times BEQ S1,R0,80793040 ;branch if handler NULL ADDIU S0,S0,FFFF ;S0-- count-- JALR RA,S1 ;jump and link to handler A3 ADDU A0,R0,R0 ;A0=0 //80793040: loopus BNE S0,R0,80793030 ;repeat for count NOP //80793048: return LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 8079305C ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 SW S1,0014 (SP) ADDU S1,A1,R0 BEQ S0,R0,807930A8 SW RA,0018 (SP) BEQ S1,R0,80793088 ADDIU S0,S0,FFFF JALR RA,S1 ADDU A0,R0,R0 JAL 80792F84 ;unconditional return NOP BEQ S1,R0,807930A0 NOP JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP BNE S0,R0,80793078 NOP LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 807930BC unconditional return JR RA NOP 807930C4 display char A2 in colour A3 at {A0,A1}; 80-83 special ADDIU SP,SP,FFE8 ADDIU V0,A2,FF80 ;V0=A2-80: catch special chars SLTIU V0,V0,0004 BEQ V0,R0,807930DC ;branch if not 80,81,82,83 SW RA,0010 (SP) ADDIU A2,A2,0021 ;A2+=21: use A0,A1,A2,A3 instead //807930DC: JAL 8078ED30 ;display character A2 in colour A3 at {A0,A1} ADDIU A0,A0,0040 ;A0+=40: horz.offset for TVs LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 807930F0 wait for A0 vsyncs accepts: A0=count ADDIU SP,SP,FFE8 SW S0,0010 (SP) ADDU S0,A0,R0 ;S0=A0: count BLEZ S0,80793114 SW RA,0014 (SP) //80793104: wait for vsync JAL 80785460 ;wait until video refresh ADDIU S0,S0,FFFF ;S0-- count-- BGTZ S0,80793104 ;loop for [A0] vsyncs NOP //80793114: return LW RA,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0018 80793124 ADDIU SP,SP,FFE0 ANDI A2,A2,000F SLTI V0,A2,000A BNE V0,R0,80793140 SW RA,0018 (SP) J 80793144 ADDIU V0,A2,0037 //80793140: ADDIU V0,A2,0030 SB V0,0010 (SP) ADDIU A2,SP,0010 JAL 80792BF8 SB R0,0011 (SP) LW RA,0018 (SP) JR RA ADDIU SP,SP,0020 80793160 ADDIU SP,SP,FFD8 SW S0,0010 (SP) ADDU S0,A0,R0 SW S1,0014 (SP) ADDU S1,A1,R0 SW S2,0018 (SP) ADDU S2,A2,R0 SW S3,001C (SP) ADDU S3,A3,R0 ANDI A2,S2,00FF SW RA,0020 (SP) JAL 80793124 SRL A2,A2,0x4 ADDIU A0,S0,0008 ADDU A1,S1,R0 ANDI A2,S2,000F JAL 80793124 ADDU A3,S3,R0 LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 807931C4 ADDIU SP,SP,FFD8 SW S0,0010 (SP) ADDU S0,A0,R0 SW S1,0014 (SP) ADDU S1,A1,R0 SW S2,0018 (SP) ADDU S2,A2,R0 SW S3,001C (SP) ADDU S3,A3,R0 SRA A2,S2,0x8 SW RA,0020 (SP) JAL 80793160 ANDI A2,A2,00FF ADDIU A0,S0,0010 ADDU A1,S1,R0 ANDI A2,S2,00FF JAL 80793160 ADDU A3,S3,R0 LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80793228 ADDIU SP,SP,FFD8 SW S0,0010 (SP) ADDU S0,A0,R0 SW S1,0014 (SP) ADDU S1,A1,R0 SW S2,0018 (SP) ADDU S2,A2,R0 SW S3,001C (SP) ADDU S3,A3,R0 SW RA,0020 (SP) JAL 807931C4 SRA A2,S2,0x10 ADDIU A0,S0,0020 ADDU A1,S1,R0 ANDI A2,S2,FFFF JAL 807931C4 ADDU A3,S3,R0 LW RA,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0028 80793288 unconditional return JR RA NOP 80793290 unconditional return JR RA NOP 80793298 waits until buttons A0 have been held for A1 or released accepts: A0=button/stick mask, A1=time, A2=nonzero increments A1 by 0xF ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 ;A0=S1: mask SW S0,0010 (SP) ADDU S0,A1,R0 ;S0=A1: time BEQ A2,R0,807932B8 ;branch if no default required SW RA,0018 (SP) ADDIU S0,S0,000F ;S0+=F: count+=15 //807932B8: BEQ S0,R0,807932E4 ;return if count 0 NOP //807932C0: loop until time satisfied JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP AND V0,V0,S1 BEQ V0,R0,807932E4 ;branch if buttons released NOP JAL 80785460 ;wait until video refresh ADDIU S0,S0,FFFF BNE S0,R0,807932C0 NOP //807932E4: return LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 807932F8 ADDIU SP,SP,FFB0 ADDU T3,A1,R0 LW A1,0068 (SP) LW T2,0080 (SP) ADDIU A1,A1,FFFF DIV A1,T2 BNE T2,R0,8079331C NOP BREAK 00001C00 ADDIU AT,R0,FFFF BNE T2,AT,80793334 LUI AT,8000 BNE A1,AT,80793334 NOP BREAK 00001800 MFLO A1 LW A2,006C (SP) SW S7,0044 (SP) LW S7,0084 (SP) ADDIU A2,A2,FFFF DIV A2,S7 BNE S7,R0,80793358 NOP BREAK 00001C00 ADDIU AT,R0,FFFF BNE S7,AT,80793370 LUI AT,8000 BNE A2,AT,80793370 NOP BREAK 00001800 MFLO A2 LW T0,0060 (SP) LUI V0,807A LW V1,B254 (V0) SW RA,004C (SP) SW S8,0048 (SP) SW S6,0040 (SP) SW S5,003C (SP) SW S4,0038 (SP) SW S3,0034 (SP) SW S2,0030 (SP) SW S1,002C (SP) SW S0,0028 (SP) SRL V0,V1,0x1F ADDU V1,V1,V0 LW V0,007C (SP) SRA V1,V1,0x1 MULT V0,T3 LW V0,0078 (SP) ADDU T0,T0,V1 SLL V0,V0,0x1 ADDU S4,A0,V0 MFLO T1 SLL V0,T1,0x1 ADDU S4,S4,V0 LW T1,0064 (SP) ADDIU S8,A2,0001 BNE A1,R0,80793430 ADDIU S3,A1,0001 BNE S8,S3,80793430 LUI A1,DFFF ORI A1,A1,FFFF ADDU A0,S4,R0 ADDU A2,T2,R0 ADDU A3,S7,R0 LUI V0,807A LW V1,B238 (V0) SLL V0,T0,0x1 SW T3,0010 (SP) ADDU V1,V1,V0 SLL V0,T1,0x2 ADDU V0,V0,T1 SLL V0,V0,0x7 ADDU S0,V1,V0 JAL 807812E0 AND A1,S0,A1 J 807934D4 NOP BLEZ S8,807934D4 ADDU S2,R0,R0 SLL T0,T0,0x1 LUI T4,DFFF ORI T4,T4,FFFF SLL S6,T2,0x1 SLL V0,T1,0x2 ADDU S5,V0,T1 SW T0,0018 (SP) SW T4,001C (SP) LUI T4,807A ADDU S1,R0,R0 LW V1,B238 (T4) LW T4,0018 (SP) SLL V0,S5,0x7 ADDU V1,V1,T4 LW T4,001C (SP) ADDU S0,V1,V0 BLEZ S3,807934B8 AND S0,S0,T4 ADDU A0,S4,R0 ADDU A1,S0,R0 ADDU A2,T2,R0 ADDU A3,S7,R0 SW T3,0010 (SP) SW T2,0020 (SP) JAL 807812E0 SW T3,0024 (SP) ADDIU S1,S1,0001 SLT V0,S1,S3 LW T2,0020 (SP) LW T3,0024 (SP) BNE V0,R0,80793480 ADDU S0,S0,S6 SLL V0,S7,0x2 ADDU V0,V0,S7 ADDU S5,S5,V0 ADDIU S2,S2,0001 SLT V0,S2,S8 BNE V0,R0,8079345C LUI T4,807A LW RA,004C (SP) LW S8,0048 (SP) LW S7,0044 (SP) LW S6,0040 (SP) LW S5,003C (SP) LW S4,0038 (SP) LW S3,0034 (SP) LW S2,0030 (SP) LW S1,002C (SP) LW S0,0028 (SP) JR RA ADDIU SP,SP,0050 80793504 print string A1 centered on row A0 in colour A2 accepts: A0=ypos, A1=p->string, A2=colour ADDIU SP,SP,FFE0 ADDU V0,A0,R0 ;V0=A0: ADDU A3,A1,R0 ;A3=A1: p->string ADDU A0,R0,R0 ;A0=0 ADDU A1,V0,R0 ;A1=[A0 f/caller]: ypos SW A2,0010 (SP) ;A2->SP+10: colour SW RA,0018 (SP) JAL 8078F904 ;print string A3 centered to A2 in colour SP+10 at {A0,A1} ADDIU A2,R0,0140 ;A2=140 LW RA,0018 (SP) JR RA ADDIU SP,SP,0020 80793534 sprintf(A1,"%08d",A0) accepts: A0=value, A1=p->final string SB R0,0008 (A1) ;0->A1+8: NULL value ADDIU A2,R0,0007 ;A2=7 count=7 //8079353C: convert each nibble SLL V0,A2,0x2 ;V0=count*4: bitshift SRLV V0,A0,V0 ;V0=nibble A2 of A0 ANDI V1,V0,000F ;V1=V0&F: only a nibble SLTIU V0,V1,000A BNE V0,R0,80793558 ;branch if 0-9 ADDIU V0,V1,0030 ;V0=V1+30: 0-9 to letter code ADDIU V0,V1,0037 ;V0=V1+37: 0xA-0xF to letter code //80793558: save char to string SB V0,0000 (A1) ;char->A1+0: save char to string ADDIU A2,A2,FFFF ;A2-- count-- BGEZ A2,8079353C ;loop 7 times ADDIU A1,A1,0001 ;A1++ p->next char in string JR RA NOP 80793570 sprintf(A1,"%02d",A0) accepts: A0=byte, A1=p->final string SB R0,0002 (A1) ;0->A1+2: NULL terminator ADDIU A2,R0,0001 ;A2=1 count=1 ANDI A0,A0,00FF ;A0->byte //8079357C: convert each nibble SLL V0,A2,0x2 ;V0=count*4: bitshift SRAV V0,A0,V0 ;V0=nibble A2 of A0 ANDI V1,V0,000F ;V1=V0&F: only a nibble SLTIU V0,V1,000A BNE V0,R0,80793598 ;branch if 0-9 ADDIU V0,V1,0030 ;V0=V1+30: 0-9 to letter code ADDIU V0,V1,0037 ;V0=V1+37: 0xA-0xF to letter code //80793598: save char to string SB V0,0000 (A1) ADDIU A2,A2,FFFF ;A2-- count-- BGEZ A2,8079357C ;loop 1 time ADDIU A1,A1,0001 ;A1++ p->next char in string JR RA NOP 807935B0 fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} accepts: A0=ulx, A1=uly, A2=lrx, A3=lry, SP+10=red, SP+14=green, SP+18=blue ADDIU SP,SP,FFE8 LBU V1,002B (SP) ;V1=[SP+10 f/caller]: red LBU T2,002F (SP) ;T2=[SP+14 f/caller]: green LBU V0,0033 (SP) ;V0=[SP+18 f/caller]: blue SW RA,0010 (SP) SRL V1,V1,0x3 ;V1/=8: red->5bit colour SLL V1,V1,0xB ;V1*=800 SRL T2,T2,0x3 ;T2/=8: green->5bit colour SLL T2,T2,0x6 ;T2*=40 OR V1,V1,T2 SRL V0,V0,0x3 ;V0/=8: blue->5bit colour SLL V0,V0,0x1 ;V0*=2 OR V1,V1,V0 ;V1|=V0: 15bit rgb value ADDU T1,V1,R0 ;T1=V1: rgb //807935E8: this, in a long winded sort of way, sets V0 and V1=rgba.rgba ADDU T0,R0,R0 ;T0=0 SLL V0,T0,0x10 SRL T2,T1,0x10 ;T2=16bit value>>16 bits... OR V0,V0,T2 ;V0|=T2: should be 0 SLL V1,T1,0x10 ;V1=rgb*10000 OR V0,T0,V0 ;V0|=0: should still be zero... OR V1,T1,V1 ;V1|=T1: rgba.rgba SLL T2,T1,0x0 ;T2=T1: rgba ADDU T3,R0,R0 ;T3=0 OR V0,V0,T2 ;V0|=T2: rgba OR V1,V1,T3 ;V1|=0: that was stupid SLL T0,T1,0x10 ;T0=rgba*10000 ADDU T1,R0,R0 ;T1=0 OR V0,V0,T0 ;V0|=T0: rgba.rgba OR V1,V1,T1 ;V1|=0: that was stupid... LUI AT,807A SW V0,B228 (AT) ;V0->8079B228: rgba.rgba LUI AT,807A SW V1,B22C (AT) ;V1->8079B22C: rgba.rgba JAL 80784940 ;fill region {A0,A1} to {A2,A3} with colour NOP LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80793648 restore original game VI settings ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80785460 ;wait until video refresh NOP LUI V1,807A ADDIU V0,V1,A000 ;V0=8079A000: org.VI settings LW V1,A000 (V1) ;V1=8079A000: VI Status LW A0,0004 (V0) ;A0=8079A004: VI dram LW A1,0008 (V0) ;A1=8079A008: VI width LW A2,0014 (V0) ;A2=8079A014: VI timing LW A3,0018 (V0) ;A3=8079A018: VI vert. sync LW T0,001C (V0) ;T0=8079A01C: VI horz.sync LW T1,0020 (V0) ;T1=8079A020: VI horz.sync leap LW T2,0024 (V0) ;T2=8079A024: VI horz. video LW T3,0028 (V0) ;T3=8079A028: VI vert. video LW T4,002C (V0) ;T4=8079A02C: VI burst LW T5,0030 (V0) ;T5=8079A030: VI x scale LW T6,0034 (V0) ;T6=8079A034: VI y scale LUI V0,A440 SW V1,0000 (V0) ;etc. should be obvious, eh? SW A0,0004 (V0) SW A1,0008 (V0) SW A2,0014 (V0) SW A3,0018 (V0) SW T0,001C (V0) SW T1,0020 (V0) SW T2,0024 (V0) SW T3,0028 (V0) SW T4,002C (V0) SW T5,0030 (V0) SW T6,0034 (V0) LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 807936D0 save original game's VI registers LUI V0,A440 LW A0,0000 (V0) ;A0=A4400000: VI Status LUI V1,807A SW A0,A000 (V1) ;A0->8079A000: org->buffer LW A0,0004 (V0) ;etc. pretty obvious LW A1,0008 (V0) LW A2,0014 (V0) LW A3,0018 (V0) LW T0,001C (V0) LW T1,0020 (V0) LW T2,0024 (V0) LW T3,0028 (V0) LW T4,002C (V0) LW T5,0030 (V0) LW V0,0034 (V0) ADDIU V1,V1,A000 SW A0,0004 (V1) SW A1,0008 (V1) SW A2,0014 (V1) SW A3,0018 (V1) SW T0,001C (V1) SW T1,0020 (V1) SW T2,0024 (V1) SW T3,0028 (V1) SW T4,002C (V1) SW T5,0030 (V1) JR RA SW V0,0034 (V1) 80793740 restore org.game VI regs f/ 8079A040 ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80785460 ;wait until video refresh NOP LUI V1,807A ADDIU V0,V1,A040 ;V0=8079A040: LW V1,A040 (V1) ;V1=8079A040: VI Status LW A0,0004 (V0) ;etc. rest of saved registers LW A1,0008 (V0) LW A2,0014 (V0) LW A3,0018 (V0) LW T0,001C (V0) LW T1,0020 (V0) LW T2,0024 (V0) LW T3,0028 (V0) LW T4,002C (V0) LW T5,0030 (V0) LW T6,0034 (V0) LUI V0,A440 SW V1,0000 (V0) ;V1->A4400000: restore VI Status SW A0,0004 (V0) ;etc. for rest of regs SW A1,0008 (V0) SW A2,0014 (V0) SW A3,0018 (V0) SW T0,001C (V0) SW T1,0020 (V0) SW T2,0024 (V0) SW T3,0028 (V0) SW T4,002C (V0) SW T5,0030 (V0) SW T6,0034 (V0) LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 807937C8 save original game's VI regs to 8079A040 LUI V0,A440 LW A0,0000 (V0) ;A0=A4400000: VI Status LUI V1,807A SW A0,A040 (V1) ;A0->8079A040: org->buffer LW A0,0004 (V0) ;etc. LW A1,0008 (V0) LW A2,0014 (V0) LW A3,0018 (V0) LW T0,001C (V0) LW T1,0020 (V0) LW T2,0024 (V0) LW T3,0028 (V0) LW T4,002C (V0) LW T5,0030 (V0) LW V0,0034 (V0) ADDIU V1,V1,A040 SW A0,0004 (V1) SW A1,0008 (V1) SW A2,0014 (V1) SW A3,0018 (V1) SW T0,001C (V1) SW T1,0020 (V1) SW T2,0024 (V1) SW T3,0028 (V1) SW T4,002C (V1) SW T5,0030 (V1) JR RA SW V0,0034 (V1) 80793838 unconditional return JR RA NOP 80793840 ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 80787EE0 ;cycle GS activity display, returning V0=value on port or 0 NOP ADDIU V1,R0,0003 BNE V0,V1,80793864 ;return if not 3 NOP JAL 80791AB4 ;retrieve and execute PC comms commands NOP //80793864: return LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80793870 ADDIU SP,SP,FFD8 SW RA,0024 (SP) JAL 80787AE8 ;V0=COP0 Status SW S0,0020 (SP) LUI S0,807A ADDIU A0,R0,FFFE AND A0,V0,A0 ;A0=Status & FFFFFFFE: unset bit 1 JAL 80787AF4 ;A0->COP0 Status SW V0,B1EC (S0) ;V0->8079B1EC: original status JAL 80793840 NOP JAL 80787F80 ;V0=value at cur.hardware + offset A0 ADDU A0,R0,R0 ANDI V0,V0,0400 BNE V0,R0,80793A14 NOP //807938B0: JAL 80787F80 ;V0=value at cur.hardware + offset A0 ADDU A0,R0,R0 ANDI V0,V0,0400 BEQ V0,R0,807938B0 //807938C0: LUI V1,A07E ORI V1,V1,9C00 ;V1=A07E9C00 LUI A0,A07C ORI A0,A0,9C00 ;A0=A07C9C00 ADDU T0,R0,R0 ;T0=0 ADDU T1,R0,R0 ;T0=0 LUI V0,807A SW V1,9E10 (V0) ;V1->80799E10: p->codegen runtime data LUI V0,807A SW A0,9DF8 (V0) ;A0->80799DF8: LUI V0,F7BC ORI V0,V0,F7BC LUI V1,F7BC ORI V1,V1,F7BC LUI AT,807A SW T0,B228 (AT) LUI AT,807A SW T1,B22C (AT) LUI AT,807A SW V0,B300 (AT) LUI AT,807A SW V1,B304 (AT) JAL 80785DF0 NOP ADDU A1,R0,R0 LUI V0,807A ADDIU A0,V0,A000 LUI V1,A440 //80793930: LW V0,0000 (V1) ADDIU V1,V1,0004 ADDIU A1,A1,0001 SW V0,0000 (A0) SLTI V0,A1,000E BNE V0,R0,80793930 ADDIU A0,A0,0004 JAL 80785460 ;wait until video refresh LUI S0,807A JAL 80785948 ADDU A0,R0,R0 ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) JAL 80792F8C ;display and swap video buffers, then invalidate cache NOP ADDU A0,R0,R0 ADDU A1,A0,R0 ADDIU A2,R0,0140 ADDIU A3,R0,00F0 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) LW V1,9E10 (S0) ;V1=80799E10: p->codegen runtime data LW V0,0044 (V1) BNE V0,R0,807939B8 ADDIU V0,R0,0001 SW V0,0044 (V1) //807939B8: LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data SW R0,0050 (V0) JAL 80785EB8 ;V0=controller 1 buttons/stick state SW R0,0054 (V0) JAL 8079026C NOP LW V0,9E10 (S0) ;V0=80799E10: p->codegen runtime data LW V1,0004 (V0) SW R0,0108 (V0) LUI V0,807A SW V1,A080 (V0) //807939E4: JAL 80785EB8 ;V0=controller 1 buttons/stick state NOP BNE V0,R0,807939E4 NOP JAL 80793648 ;restore original game VI settings NOP LUI V0,807A LW A0,B1EC (V0) ;A0=8079B1EC: org.status JAL 80787AF4 ;A0->COP0 Status NOP J 80793A24 ;return TRUE ADDIU V0,R0,0001 //80793A14: reset status and return FALSE LW A0,B1EC (S0) ;A0=8079B1EC: org.status JAL 80787AF4 ;A0->COP0 Status NOP //80793A20: return FALSE ADDU V0,R0,R0 //80793A24: return LW RA,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0028 80793A34 ADDIU SP,SP,FFC0 SW S1,001C (SP) ADDU S1,A0,R0 SW S0,0018 (SP) ADDIU S0,A1,0001 SW S4,0028 (SP) ADDIU S4,A3,FFFF ADDIU A0,S1,0015 ADDU A1,S0,R0 LW V1,0058 (SP) SLL A2,A2,0x3 SW S5,002C (SP) LW S5,0050 (SP) LW V0,0054 (SP) ADDIU S0,S0,0011 SW S3,0024 (SP) ADDU S3,R0,R0 SW RA,0038 (SP) SW S7,0034 (SP) SW S6,0030 (SP) SW S2,0020 (SP) SW R0,0010 (SP) JAL 8078F904 ;print string A3 centered to A2 in colour SP+10 at {A0,A1} ADDU A3,V1,R0 ADDIU S2,SP,0060 LW V1,FFFC (S2) BLEZ S4,80793B30 ADDIU S1,S1,0019 LUI S7,8079 LUI S6,8079 BNE S5,S3,80793AD8 ADDU A3,R0,R0 LUI A3,003E LW V0,0054 (SP) BEQ V0,R0,80793AF0 ORI A3,A3,003E LUI A3,001E ORI A3,A3,001E ADDIU S1,S1,0001 J 80793AF0 ADDIU S0,S0,0001 LW V0,5974 (S7) BEQ V0,S3,80793AF4 ADDU A0,S1,R0 LW V0,5970 (S6) BEQL V0,R0,80793B04 ADDIU S0,S0,000E ADDU A0,S1,R0 ADDU A1,S0,R0 JAL 80792BF8 ADDU A2,V1,R0 ADDIU S0,S0,000E ADDIU S2,S2,0004 LW V1,FFFC (S2) BNE S5,S3,80793B28 ADDIU S4,S4,FFFF LW V0,0054 (SP) BEQ V0,R0,80793B28 NOP ADDIU S0,S0,FFFF ADDIU S1,S1,FFFF BGTZ S4,80793AAC ADDIU S3,S3,0001 LW RA,0038 (SP) LW S7,0034 (SP) LW S6,0030 (SP) LW S5,002C (SP) LW S4,0028 (SP) LW S3,0024 (SP) LW S2,0020 (SP) LW S1,001C (SP) LW S0,0018 (SP) JR RA ADDIU SP,SP,0040 80793B5C ADDIU SP,SP,FFD0 SW S1,0024 (SP) ADDU S1,A0,R0 ADDU A0,R0,R0 ADDIU A1,S1,FFFE ADDIU A2,R0,0140 ADDIU A3,R0,0022 SW RA,0028 (SP) SW S0,0020 (SP) SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDU A0,S1,R0 LUI A2,FFFE LUI S0,807A ADDIU S0,S0,9E20 LW A1,007C (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,S1,000A LUI A2,FFFE LW A1,0080 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE ADDIU A0,S1,0014 LUI A2,FFFE LW A1,0084 (S0) JAL 80793504 ;print string A1 centered on row A0 in colour A2 ORI A2,A2,FFFE LW RA,0028 (SP) LW S1,0024 (SP) LW S0,0020 (SP) JR RA ADDIU SP,SP,0030 80793BE8 LBU V0,0000 (A0) BEQ V0,R0,80793C08 ADDU V1,R0,R0 ADDIU V1,V1,0001 ADDU V0,A0,V1 LBU V0,0000 (V0) BNEL V0,R0,80793BF8 ADDIU V1,V1,0001 JR RA ADDU V0,V1,R0 80793C10 ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 SW S0,0010 (SP) SW RA,0018 (SP) JAL 80793BE8 ADDU S0,R0,R0 ADDU A0,V0,R0 BEQ A0,R0,80793C6C ADDU V0,S0,R0 BLEZ A0,80793C6C ADDU A1,R0,R0 ADDIU A0,A0,FFFF ADDU V0,S1,A1 ADDIU A1,A1,0001 LBU V1,0000 (V0) SLL V0,S0,0x2 ADDU V0,V0,S0 SLL S0,V0,0x1 ADDIU V1,V1,FFD0 BGTZ A0,80793C40 ADDU S0,S0,V1 ADDU V0,S0,R0 LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80793C80 ADDIU SP,SP,FFE0 SW S1,0014 (SP) ADDU S1,A0,R0 SW S0,0010 (SP) SW RA,0018 (SP) JAL 80793BE8 ADDU S0,R0,R0 ADDU A0,V0,R0 BEQ A0,R0,80793CF0 ADDU V0,S0,R0 BLEZ A0,80793CF0 ADDU A1,R0,R0 ADDU V1,S1,A1 LBU V0,0000 (V1) ADDIU V0,V0,FFD0 SLTIU V0,V0,000A BEQ V0,R0,80793CD4 ADDIU A0,A0,FFFF LBU V0,0000 (V1) J 80793CDC ADDIU V0,V0,FFD0 LBU V0,0000 (V1) ADDIU V0,V0,FFC9 ADDIU A1,A1,0001 SLL S0,S0,0x4 BGTZ A0,80793CB0 ADDU S0,S0,V0 ADDU V0,S0,R0 LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80793D04 ADDIU SP,SP,FFA0 LW V0,0070 (SP) SW S1,003C (SP) ADDU S1,A3,R0 SW S5,004C (SP) SLL S5,A2,0x3 SW RA,005C (SP) SW S8,0058 (SP) SW S7,0054 (SP) SW S6,0050 (SP) SW S4,0048 (SP) SW S3,0044 (SP) SW S2,0040 (SP) SW S0,0038 (SP) SW A0,0060 (SP) BNE V0,R0,80793D68 SW A1,0064 (SP) ADDIU A0,A0,0006 ADDIU A1,A1,0004 ADDIU A2,S5,001C ADDIU A3,R0,0017 SW R0,0010 (SP) SW R0,0014 (SP) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} SW R0,0018 (SP) ADDIU A1,R0,0030 LUI T0,807A ADDIU A2,R0,0041 LUI S4,807A LW A0,9DF8 (T0) LW T0,0060 (SP) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data ADDIU S3,R0,0015 SW T0,0010 (SP) LW T0,0064 (SP) ADDIU S0,R0,0010 SW S3,0018 (SP) SW S0,001C (SP) SW T0,0014 (SP) LW V0,006C (V1) LUI A3,0080 SW V0,0020 (SP) LW V0,0068 (V1) ORI A3,A3,8080 SW R0,0028 (SP) SW R0,002C (SP) SW S3,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 LW T0,0060 (SP) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data ADDU S7,T0,S3 LUI T0,807A LW A0,9DF8 (T0) LW T0,0064 (SP) ORI A3,A3,8080 SW S5,0018 (SP) SW S0,001C (SP) SW S7,0010 (SP) SW T0,0014 (SP) LW V0,006C (V1) ADDU S7,S7,S5 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU T0,R0,0008 SW S3,0028 (SP) SW R0,002C (SP) SW T0,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI T0,807A LW A0,9DF8 (T0) LW T0,0064 (SP) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data LUI A3,0080 SW S7,0010 (SP) SW S0,001C (SP) SW T0,0014 (SP) ADDIU T0,R0,0013 SW T0,0018 (SP) LW V0,006C (V1) ORI A3,A3,8080 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU T0,R0,001D SW T0,0028 (SP) ADDIU T0,R0,0013 SW R0,002C (SP) SW T0,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb ADDIU S2,R0,0004 ADDU A2,S5,R0 LW T0,0060 (SP) ADDU A3,S1,R0 SW R0,0010 (SP) ADDU S6,T0,S3 LW T0,0064 (SP) ADDU A0,S6,R0 JAL 8078F904 ;print string A3 centered to A2 in colour SP+10 at {A0,A1} ADDIU A1,T0,0002 ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI A3,0080 ORI A3,A3,8080 LW T0,0064 (SP) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data ADDU S8,T0,S0 LUI T0,807A LW A0,9DF8 (T0) LW T0,0060 (SP) ADDU S7,S6,S5 SW S3,0018 (SP) SW S2,001C (SP) SW S8,0014 (SP) SW T0,0010 (SP) LW V0,006C (V1) ADDIU S1,R0,000E SW V0,0020 (SP) LW V0,0068 (V1) ADDIU S0,R0,0001 SW R0,0028 (SP) SW S1,002C (SP) SW S3,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 LUI T0,807A ADDIU A2,R0,0041 LW A0,9DF8 (T0) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data LUI A3,0080 SW S6,0010 (SP) SW S8,0014 (SP) SW S5,0018 (SP) SW S2,001C (SP) LW V0,006C (V1) ORI A3,A3,8080 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU T0,R0,0008 SW S3,0028 (SP) SW S1,002C (SP) SW T0,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 LUI T0,807A LUI A3,0080 LW A0,9DF8 (T0) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data ADDIU T0,R0,0013 SW S7,0010 (SP) SW S8,0014 (SP) SW T0,0018 (SP) SW S2,001C (SP) LW V0,006C (V1) ORI A3,A3,8080 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU T0,R0,001D SW T0,0028 (SP) ADDIU T0,R0,0013 SW S1,002C (SP) SW T0,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 ADDIU A2,R0,0041 ADDIU S0,R0,0007 LW T0,0064 (SP) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data ADDIU S8,T0,0014 LUI T0,807A LW A0,9DF8 (T0) LW T0,0060 (SP) LUI A3,0080 SW S3,0018 (SP) SW S0,001C (SP) SW S8,0014 (SP) SW T0,0010 (SP) LW V0,006C (V1) ORI A3,A3,8080 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU S1,R0,003A SW R0,0028 (SP) SW S1,002C (SP) SW S3,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 LUI T0,807A ADDIU A2,R0,0041 LW A0,9DF8 (T0) LW V1,9E10 (S4) ;V1=80799E10: p->codegen runtime data LUI A3,0080 SW S6,0010 (SP) SW S8,0014 (SP) SW S5,0018 (SP) SW S0,001C (SP) LW V0,006C (V1) ORI A3,A3,8080 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU T0,R0,0008 SW S3,0028 (SP) SW S1,002C (SP) SW T0,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) ADDIU A1,R0,0030 LUI T0,807A ADDIU A2,R0,0041 LW A0,9DF8 (T0) ADDIU T0,R0,0013 LW V1,9E10 (S4) LUI A3,0080 SW S7,0010 (SP) SW S8,0014 (SP) SW T0,0018 (SP) SW S0,001C (SP) LW V0,006C (V1) ORI A3,A3,8080 SW V0,0020 (SP) LW V0,0068 (V1) ADDIU T0,R0,001D SW T0,0028 (SP) ADDIU T0,R0,0013 SW S1,002C (SP) SW T0,0030 (SP) SW S0,0034 (SP) JAL 807932F8 SW V0,0024 (SP) LW RA,005C (SP) LW S8,0058 (SP) LW S7,0054 (SP) LW S6,0050 (SP) LW S5,004C (SP) LW S4,0048 (SP) LW S3,0044 (SP) LW S2,0040 (SP) LW S1,003C (SP) LW S0,0038 (SP) JR RA ADDIU SP,SP,0060 80794118 ADDIU SP,SP,FFC8 SW S0,0028 (SP) ADDU S0,V0,R0 SW RA,0034 (SP) SW S2,0030 (SP) SW S1,002C (SP) SW V0,0020 (SP) LW V0,0020 (S0) LW V0,0018 (V0) ADDIU V0,V0,FFFE SLTIU V0,V0,0002 BNE V0,R0,80794190 NOP JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP JAL 80785460 ;wait until video refresh NOP LW V0,0024 (S0) BNE V0,R0,8079418C ADDIU V0,R0,0001 LW V0,0020 (S0) SW R0,0010 (SP) LW A2,0028 (S0) LW A0,0004 (V0) LW A1,0008 (V0) LW A3,0000 (V0) JAL 80793D04 NOP ADDIU V0,R0,0001 SW V0,0024 (S0) LW A0,0020 (S0) LW V1,0018 (A0) ADDIU V0,R0,0003 BEQ V1,V0,807941DC NOP LW V0,0028 (S0) LW V1,0004 (A0) LW A0,0030 (S0) SLL V0,V0,0x2 ADDIU V0,V0,0016 ADDU V1,V1,V0 LW V0,0020 (S0) SLL A0,A0,0x2 SW V1,002C (S0) SUBU V1,V1,A0 SW V1,002C (S0) LW V0,0008 (V0) J 807941EC ADDIU V0,V0,000D LW V0,0004 (A0) LW V1,0020 (S0) SW V0,002C (S0) LW V0,0008 (V1) SW V0,0034 (S0) JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb SB R0,0001 (S0) JAL 80785460 ;wait until video refresh NOP LW V0,0030 (S0) BLEZ V0,807942CC SW R0,0038 (S0) ADDIU S1,S0,0008 ADDIU S2,R0,0001 JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP LW V0,003C (S0) BEQ V0,R0,807942B0 NOP LW V0,0038 (S0) LW A0,0038 (S0) ADDU V0,S1,V0 LBU V1,0000 (V0) LW V0,0040 (S0) BNE A0,V0,80794288 SB V1,0000 (S0) LW V0,0020 (S0) LW V0,0018 (V0) BEQ V0,S2,80794288 ADDIU A2,R0,0008 SW R0,0010 (SP) SW R0,0014 (SP) SW R0,0018 (SP) LW A0,002C (S0) LW A1,0034 (S0) JAL 807935B0 ;fill region from {A0,A1} to {A2,A3} with colour {SP+10,SP+14,SP+18} ADDU A3,A2,R0 ADDU A2,S0,R0 LUI A3,FFFE LW A0,002C (S0) LW A1,0034 (S0) J 8079429C ORI A3,A3,FFFE ADDU A2,S0,R0 LUI A3,7BDE LW A0,002C (S0) LW A1,0034 (S0) ORI A3,A3,7BDE JAL 80792BF8 NOP LW V0,002C (S0) ADDIU V0,V0,0008 SW V0,002C (S0) LW V0,0038 (S0) LW V1,0030 (S0) ADDIU V0,V0,0001 SW V0,0038 (S0) SLT V0,V0,V1 BNE V0,R0,80794214 NOP JAL 80787A58 ;invalidate cache in first 6Kb and writeback in first 3Kb NOP LW RA,0034 (SP) LW S2,0030 (SP) LW S1,002C (SP) LW S0,0028 (SP) JR RA ADDIU SP,SP,0038 807942EC ADDIU SP,SP,FF80 SW A1,0084 (SP) LW A1,0094 (SP) SW S5,006C (SP) ADDU S5,A3,R0 SW S1,005C (SP) ADDU S1,R0,R0 SW S2,0060 (SP) ADDU S2,S1,R0 SW S7,0074 (SP) LW S7,0090 (SP) ADDIU T0,SP,0080 SW A0,0080 (SP) LUI A0,807A SW S8,0078 (SP) LW S8,009C (SP) LUI V0,807A SW T0,0030 (SP) LW T0,B238 (A0) LW V1,B318 (V0) ADDIU V0,R0,0001 SW S0,0058 (SP) ADDIU S0,R0,0010 SW RA,007C (SP) SW S6,0070 (SP) SW S4,0068 (SP) SW S3,0064 (SP) SW A2,0088 (SP) SW V0,004C (SP) SW R0,0034 (SP) SW T0,0054 (SP) BNE S5,S0,807943A0 SW V1,B238 (A0) ADDU A0,A1,R0 JAL 80793534 ;sprintf(A1,"%08d",A0) ADDIU A1,SP,0018 ADDIU V0,R0,0008 BNE S7,V0,80794390 NOP J 807943C4 ADDIU V0,R0,0002 BEQL S7,S5,807943C4 ADDIU V0,R0,0004 J 807943C8 SW V0,0040 (SP) ADDU A0,A1,R0 JAL 80792C44 ADDIU A1,SP,0018 ADDIU V0,R0,0008 BEQ S7,V0,807943C4 ADDIU V0,R0,0003 BNE S7,S0,807943C4 ADDIU V0,R0,000A ADDIU V0,R0,0005 SW V0,0040 (SP) ADDIU S0,SP,0018 LW V0,0040 (SP) ADDIU S3,R0,0030 ADDIU V0,V0,FFFF SW V0,0050 (SP) JAL 80793BE8 ADDIU A0,SP,0018 LW V1,0040 (SP) SLT V0,V0,V1 BEQL V0,R0,80794428 ADDIU S0,SP,0018 BLTZ V1,80794420 SW V1,0048 (SP) LW V1,0048 (SP) ADDU V0,S0,V1 LBU V0,0000 (V0) ADDU V1,V1,S0 SB V0,0001 (V1) LW V0,0048 (SP) ADDIU V0,V0,FFFF BGEZ V0,807943FC SW V0,0048 (SP) J 807943DC SB S3,0018 (SP) JAL 80793BE8 ADDIU A0,SP,0018 LW V1,0040 (SP) SLT V1,V1,V0 BEQL V1,R0,80794478 ADDIU S0,R0,0001 SW R0,0048 (SP) JAL 80793BE8 ADDU A0,S0,R0 LW A0,0048 (SP) SLT V0,A0,V0 BEQ V0,R0,80794428 ADDU V0,A0,S0 LBU V1,0001 (V0) ADDU V0,S0,A0 SB V1,0000 (V0) LW V0,0048 (SP) ADDIU V0,V0,0001 J 80794444 SW V0,0048 (SP) ADDIU S6,R0,0002 ADDIU S3,SP,0018 ADDIU S4,R0,0010 ADDIU V0,R0,000A SW R0,0000 (S8) SW V0,0038 (SP) LW V0,0098 (SP) BEQ V0,S0,807946BC NOP JAL 80792BC0 ;V0=controller 1 buttons/stick state NOP ADDU S2,V0,R0 BGEZ S2,807944C0 LUI V0,4000 ADDIU S1,R0,0002 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,8000 LUI V0,4000 AND V0,S2,V0 BEQ V0,R0,807944E0 LUI V0,1000 SW S0,0000 (S8) ADDIU S1,R0,0001 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,4000 LUI V0,1000 AND V0,S2,V0 BEQ V0,R0,80794500 LUI V0,0800 SW S6,0000 (S8) ADDIU S1,R0,0001 JAL 80792DFC ;wait until buttons/stick state A0 released LUI A0,1000 LUI V0,0800 ORI V0,V0,0002 AND V0,S2,V0 BEQ V0,R0,807945A0 LUI V0,0400 LW V0,0050 (SP) ADDU V0,S3,V0 LBU A0,0000 (V0) BEQ S5,S4,80794544 SW S0,004C (SP) ADDIU V0,A0,FFD0 ANDI V0,V0,00FF SLTIU V0,V0,0009 BNEL V0,R0,80794590 ADDIU A0,A0,0001 ANDI V1,A0,00FF J 80794588 ADDIU V0,R0,0039 ADDIU V0,A0,FFD0 ANDI V0,V0,00FF SLTIU V0,V0,0009 BNEL V0,R0,80794590 ADDIU A0,A0,0001 ANDI V1,A0,00FF ADDIU V0,R0,0039 BNE V1,V0,80794570 ADDIU V0,A0,FFBF J 80794590 ADDIU A0,R0,0041 ANDI V0,V0,00FF SLTIU V0,V0,0005 BEQ V0,R0,80794588 ADDIU V0,R0,0046 J 80794590 ADDIU A0,A0,0001 BEQL V1,V0,80794590 ADDIU A0,R0,0030 LW V0,0050 (SP) ADDU V0,S3,V0 SB A0,0000 (V0) LUI V0,0400 ORI V0,V0,0001 AND V0,S2,V0 BEQ V0,R0,8079464C LUI V0,0200 LW V0,004C (SP) BNE V0,R0,8079464C LUI V0,0200 LW V0,0050 (SP) ADDU V0,S3,V0 LBU A0,0000 (V0) BEQ S5,S4,807945F0 SW S0,004C (SP) ADDIU V0,A0,FFCF ANDI V0,V0,00FF SLTIU V0,V0,0009 BNEL V0,R0,8079463C ADDIU A0,A0,FFFF ANDI V1,A0,00FF J 80794634 ADDIU V0,R0,0030 ADDIU V0,A0,FFCF ANDI V0,V0,00FF SLTIU V0,V0,0009 BNEL V0,R0,8079463C ADDIU A0,A0,FFFF ANDI V1,A0,00FF ADDIU V0,R0,0030 BNE V1,V0,8079461C ADDIU V0,A0,FFBE J 8079463C ADDIU A0,R0,0046 ANDI V0,V0,00FF SLTIU V0,V0,0005 BEQ V0,R0,80794634 ADDIU V0,R0,0041 J 8079463C ADDIU A0,A0,FFFF BEQL V1,V0,8079463C ADDIU A0,R0,0039 LW V0,0050 (SP) ADDU V0,S3,V0 SB A0,0000 (V0) LUI V0,0200 ORI V0,V0,0004 AND V0,S2,V0 BEQ V0,R0,80794680 LUI V0,0100 LW V0,004C (SP) BNE V0,R0,80794680 LUI V0,0100 LW V0,0050 (SP) BLEZ V0,8079467C ADDIU V0,V0,FFFF SW S0,004C (SP) SW V0,0050 (SP) LUI V0,0100 ORI V0,V0,0008 AND V0,S2,V0 BEQ V0,R0,807946BC NOP LW V0,004C (SP) BNE V0,R0,807946BC NOP LW V0,0040 (SP) LW V1,0050 (SP) ADDIU V0,V0,FFFF SLT V0,V1,V0 BEQ V0,R0,807946BC ADDIU V0,V1,0001 SW S0,004C (SP) SW V0,0050 (SP) JAL 80794118 ADDIU V0,SP,0010 LW V0,0098 (SP) BEQL V0,S0,807946D0 ADDIU S1,R0,0001 BNE S1,R0,8079472C NOP JAL 80785460 ;wait until video refresh NOP BNE S2,R0,807946F0 LUI V0,807A LW V0,9E10 (V0) SW S0,0074 (V0) LW V0,004C (SP) BEQ V0,R0,8079472C NOP SW R0,0048 (SP) JAL 80794118 ADDIU V0,SP,0010 LW V0,0048 (SP) ADDIU V0,V0,0001 SW V0,0048 (SP) SLTI V0,V0,0003 BNE V0,R0,80794700 LUI V0,807A LW V0,9E10 (V0) SW R0,004C (SP) SW R0,0074 (V0) BNE S7,S4,80794774 NOP BNE S5,S4,8079474C NOP JAL 80793C80 ADDIU A0,SP,0018 J 80794758 ADDU A1,V0,R0 JAL 80793C10 ADDIU A0,SP,0018 ADDU A1,V0,R0 BNE S1,S6,807947A8 ORI V0,R0,FFFF SLT V0,V0,A1 BEQ V0,R0,807947A8 NOP J 807947A8 ADDU S1,R0,R0 BNE S5,S4,8079478C NOP JAL 80793C80 ADDIU A0,SP,0018 J 80794798 ADDU A1,V0,R0 JAL 80793C10 ADDIU A0,SP,0018 ADDU A1,V0,R0 BNE S1,S6,807947A8 SLTI V0,A1,0100 BEQL V0,R0,807947A8 ADDU S1,R0,R0 BEQ S1,R0,80794490 ADDIU V0,R0,0010 BNE S5,V0,807947C8 NOP JAL 80793C80 ADDIU A0,SP,0018 J 807947D4 ADDU A1,V0,R0 JAL 80793C10 ADDIU A0,SP,0018 ADDU A1,V0,R0 LW T0,0054 (SP) LW RA,007C (SP) LW S8,0078 (SP) LW S7,0074 (SP) LW S6,0070 (SP) LW S5,006C (SP) LW S4,0068 (SP) LW S3,0064 (SP) LW S2,0060 (SP) LW S1,005C (SP) LW S0,0058 (SP) LUI V0,807A SW T0,B238 (V0) ADDU V0,A1,R0 JR RA ADDIU SP,SP,0080 80794814 ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A0,R0 SW S1,0014 (SP) SW RA,0018 (SP) JAL 80793BE8 ADDU S1,A1,R0 LBU V1,0000 (S1) BEQ V1,R0,8079485C ADDU A0,V0,R0 ADDU A1,S1,R0 LBU V0,0000 (A1) ADDIU A1,A1,0001 ADDU V1,S0,A0 SB V0,0000 (V1) LBU V0,0000 (A1) BNE V0,R0,80794840 ADDIU A0,A0,0001 ADDU V0,S0,A0 SB R0,0000 (V0) LW RA,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 80794878 ADDIU SP,SP,FFE0 SW S0,0010 (SP) ADDU S0,A1,R0 SW S1,0014 (SP) ADDU S1,A2,R0 SW RA,001C (SP) JAL 80792C44 SW S2,0018 (SP) ADDIU S2,R0,0030 JAL 80793BE8 ADDU A0,S0,R0 SLT V0,V0,S1 BEQ V0,R0,807948D4 ADDU A0,S1,R0 BLTZL A0,8079489C SB S2,0000 (S0) ADDU V0,A0,S0 LBU V1,0000 (V0) ADDIU A0,A0,FFFF BGEZ A0,807948B8 SB V1,0001 (V0) J 8079489C SB S2,0000 (S0) LW RA,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0020 807948EC unconditional return JR RA NOP 807948F4 capture screenshot using bitdepth A2 accepts: A0=width, A1=height, A2=bitdepth ADDIU SP,SP,FFC8 SW S1,0014 (SP) ADDU S1,A2,R0 ;S1=A2: SW S2,0018 (SP) ADDIU S2,R0,0063 ;S2=63: 'c': init.LCD display SW S4,0020 (SP) ADDU S4,R0,R0 ;S4=0 SW S0,0010 (SP) LUI S0,A440 SW S5,0024 (SP) ADDU S5,R0,R0 ;S5=0 SW RA,0034 (SP) SW S8,0030 (SP) SW S7,002C (SP) SW S6,0028 (SP) SW S3,001C (SP) LW S3,0008 (S0) ;S3=A4400008: VI horz.width LW V0,0028 (S0) ;V0=A4400028: VI vert.video LW V1,0028 (S0) ;V1=A4400028: VI vert.video ADDU A0,S3,R0 ;A0=horz.width ANDI V0,V0,FFFF ;V0=vert.video&FFFF: lower short SRL V1,V1,0x10 ;v1=vert.video/10000: upper short SUBU V0,V0,V1 ;V0-=V1: difference SRL V1,V0,0x1F ;V1=nonzero if negative ADDU V0,V0,V1 ;V0+=V1: compensate for negative value JAL 807917F0 ;V0=readwrite32(A0) SRA S7,V0,0x1 ;S7=difference/2: height JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,S7,R0 ;A0=S7: height JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,S1,R0 ;A0=S1: bitdepth? ADDIU V0,S7,FFFF ;V0=height-1 SLL V0,V0,0x1 ;V0*=2: height*=size of pixels (most of the time) MULT V0,S3 LW V1,0004 (S0) ;V1=A4400004: VI dram address LUI V0,8000 OR S8,V1,V0 ;S8=address | 80000000: p->video MFLO S6 ;S6=width*height*pixelsize: total size JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,S8,R0 ;A0=S8: p->video BLEZ S7,80794A14 ;return if negative height NOP BLEZ S3,807949FC ;branch if width negative ADDU S1,R0,R0 ;S1=0 ADDU S0,S8,S6 ;S0=p->video + total size ANDI V0,S4,00FF ;V0=S4->byte //807949AC: update LCD screen sporadically BNE V0,R0,807949D0 ;update only every 0x100 bytes ADDU A0,S2,R0 ;A0=S2: LCD display ADDIU S2,S2,0001 ;S2++ next bar in LCD display JAL 80780CD0 ;display A0 to LCD screen ANDI A0,A0,00FF ;A0->byte ANDI V0,S2,00FF ;V0=S2->byte ADDIU A1,R0,0067 ;A1=67: 'g' BEQL V0,A1,807949D0 ;reset to 'c' if set to 'g' ADDIU S2,R0,0063 //807949D0: LBU A0,0000 (S0) ;A0=low byte of pixel ADDIU S0,S0,0001 ;S0++ ADDIU S4,S4,0001 ;S4++ JAL 80787D5C ;V0=readwritebyte(A0) ADDIU S1,S1,0001 ;S1++ LBU A0,0000 (S0) ;A0=high byte of pixel JAL 80787D5C ;V0=readwritebyte(A0) ADDIU S0,S0,0001 ;S0++ SLT V0,S1,S3 BNE V0,R0,807949AC ANDI V0,S4,00FF //807949FC: SLL V0,S3,0x1 SUBU S6,S6,V0 ADDIU S5,S5,0001 SLT V0,S5,S7 BNE V0,R0,8079499C NOP //80794A14: return LW RA,0034 (SP) LW S8,0030 (SP) LW S7,002C (SP) LW S6,0028 (SP) LW S5,0024 (SP) LW S4,0020 (SP) LW S3,001C (SP) LW S2,0018 (SP) LW S1,0014 (SP) LW S0,0010 (SP) JR RA ADDIU SP,SP,0038 80794A44 capture screenshot with bitdepth 16bits ADDIU SP,SP,FFE8 SW RA,0010 (SP) JAL 807917F0 ;V0=readwrite32(A0) ADDU A0,R0,R0 ;A0=0 ADDIU A0,R0,0140 ;A0=140 ADDIU A1,R0,00F0 ;A1=F0 JAL 807948F4 ;capture screenshot using bitdepth A2 ADDIU A2,R0,0010 ;A2=10 LW RA,0010 (SP) JR RA ADDIU SP,SP,0018 80794A70 org. cart's stack pointer 80794A74 runtime data 80794A78 runtime data 80794A7C runtime data 80794A80 copy 80794AEC to A0000180 and set watch LUI T0,A000 ORI T0,T0,0180 ;T0=A0000180 LUI T1,8079 ADDIU T1,T1,4ADC ;T1=80794ADC LW T2,0000 (T1) ;T2=80794ADC: function: jump to 80794AEC NOP SW T2,0000 (T0) ;T2->A0000180: copy to exception handler LW T2,0004 (T1) ;T2=80794AE0: function: jump to 80794AEC NOP SW T2,0004 (T0) ;T2->A0000184: copy to exception handler LW T2,0008 (T1) ;T2=80794AE4: function: jump to 80794AEC NOP SW T2,0008 (T0) ;T2->A0000188: copy to exception handler LW T2,000C (T1) ;T2=80794AE8: function: jump to 80794AEC NOP SW T2,000C (T0) ;T2->A000018C: copy to exception handler ADDIU T0,R0,0181 MTC0 T0,WatchLo ;set watch NOP MTC0 R0,WatchHi NOP JR RA NOP 80794ADC jump to 80794AEC LUI K0,8079 ADDIU K0,K0,4AEC ;K0=80794AEC JR K0 NOP 80794AEC MFC0 K0,Cause/DPC-Buf.Busy ORI K1,R0,005C ANDI K0,K0,007C BEQ K0,K1,80794B30 NOP BNE K0,R0,80794B20 NOP LUI K0,A430 LW K0,0008 (K0) NOP ANDI K1,K0,0002 BNE K1,R0,80794B28 NOP //80794B20: return to exception handler J 80000120 NOP //80794B28: skip to 80794B40 J 80794B40 NOP //80794B30: jump to BEC2F000 LUI K0,BEC2 ORI K0,K0,F000 ;K0=BEC2F000 JR K0 NOP //80794B40: LUI K0,8079 ADDIU K0,K0,4A70 SW SP,0000 (K0) ;SP->80794A70: save stack pointer LUI SP,807F ORI SP,SP,FF00 ;SP=807FFF00: temporary stack ADDIU SP,SP,FFB4 SW RA,0010 (SP) SW V0,0014 (SP) SW V1,0018 (SP) SW A0,001C (SP) SW A1,0020 (SP) SW A2,0024 (SP) SW A3,0028 (SP) SW T0,002C (SP) SW T1,0030 (SP) SW T2,0034 (SP) SW T3,0038 (SP) SW T4,003C (SP) SW T5,0040 (SP) SW T6,0044 (SP) SW T7,0048 (SP) JAL 80793870 NOP BEQ R0,V0,80794BB4 ;skip altering COP0 if set NOP MTC0 R0,Count/DPC-End ;0->COP0 Count NOP MTC0 R0,Compare/DPC-Status ;0->COP0 Compare NOP //80794BB4: execute active codelist if enabled LUI K0,807A ADDIU K0,K0,A080 LW K1,0000 (K0) ;K1=8079A080: TRUE if codes disabled BNE K1,R0,80794BD0 ;branch if codes disabled NOP JAL 80794C40 ;parse active code list NOP //80794BD0: load original values from stack LW RA,0010 (SP) LW V0,0014 (SP) LW V1,0018 (SP) LW A0,001C (SP) LW A1,0020 (SP) LW A2,0024 (SP) LW A3,0028 (SP) LW T0,002C (SP) LW T1,0030 (SP) LW T2,0034 (SP) LW T3,0038 (SP) LW T4,003C (SP) LW T5,0040 (SP) LW T6,0044 (SP) LW T7,0048 (SP) ADDIU SP,SP,006C LUI K0,8079 ADDIU K0,K0,4A70 LW SP,0000 (K0) ;SP=80794A70: SP from temporary location LUI K0,807A ADDIU K0,K0,A080 LW K1,0000 (K0) ;K1=8079A080: TRUE if codes disabled BNE K1,R0,80794C38 ;branch if codes disabled NOP //80794C30: jump to code list J 807C5C00 NOP //80794C38: return to exception handler J 80000120 NOP 80794C40 handles active code list ADDIU SP,SP,FFEC SW A0,0000 (SP) SW A1,0004 (SP) SW A2,0008 (SP) SW A3,000C (SP) SW T6,0010 (SP) LUI A0,8078 LW A0,040C (A0) ;A0=8078040C: p->active codelist table LW A3,0000 (A0) ;A3=active codelist+0: #codes BEQ A3,R0,80794D08 ;return if no codes! //80794C68: grab each code from list and execute LWL A1,0004 (A0) LWR A1,0007 (A0) ;A1=list+4: code.address LUI K0,D000 AND K1,A1,K0 ;K1=address & D0000000 BNE K1,K0,80794CD8 ;branch if not Dx- codetype LH A2,0008 (A0) ;A2=list+6: code.value //80794C80: Dx- codetype conditional execution LUI K0,0100 AND K1,A1,K0 ;K1=code.address & 01000000: nonzero if short, not byte LUI K0,80FF ORI K0,K0,FFFF ;K0=80FFFFFF: address mask BGTZ K1,80794CA0 ;branch if short AND A1,A1,K0 ;A1&=mask: address BEQ K1,K1,80794CA4 LB T6,0000 (A1) ;T6=byte read //80794CA0: short codetype LH T6,0000 (A1) ;T6=short read //80794CA4: determine type of comparison LUI K0,0200 AND K1,A1,K0 ;K1=code.address & 02000000: nonzero if inequality test BEQ K1,K0,80794CC4 ;branch if inequality NOP //80794CB4: test equality BEQ T6,A2,80794CFC ;branch if value read equals expected NOP BEQ K1,K1,80794CCC ;test failed! NOP //80794CC4: test inequality BNE T6,A2,80794CFC ;branch if value read differs from expected NOP //80794CCC: failed comparison test skips next code ADDI A3,A3,FFFF ;A3-- code.count-- BEQ K1,K1,80794CFC ADDI A0,A0,0006 ;A0+=6 next code //80794CD8: rest assumed to be 8x code types LUI K0,0100 AND K1,A1,K0 ;K1=code.address & 01000000: nonzero if short, not byte LUI K0,80FF ORI K0,K0,FFFF ;K0=80FFFFFF: address mask BGTZ K1,80794CF8 ;branch if short codetype AND A1,A1,K0 ;A1&=mask: address BEQ K1,K1,80794CFC SB A2,0000 (A1) ;A2->address: write byte to address //80794CF8: short codetype SH A2,0000 (A1) ;A2->address: write short to address //80794CFC: advance to next code ADDI A3,A3,FFFF ;A3-- BGTZ A3,80794C68 ;loop for remaining codes ADDI A0,A0,0006 ;A0+=6: next code //80794D08: return LW A0,0000 (SP) LW A1,0004 (SP) LW A2,0008 (SP) LW A3,000C (SP) LW T6,0010 (SP) ADDIU SP,SP,0014 JR RA NOP 80794D28 LUI K0,0004 //80794D2C: LW A3,0000 (A1) NOP SW A3,0000 (A0) ADDI A0,A0,0004 ADDI A1,A1,0004 ADDIU K0,K0,FFFF BGTZ K0,80794D2C NOP LUI T0,8000 ADDIU T1,T0,3000 ADDIU T1,T1,FFF0 //80794D58: CACHE 0000 (T0), D, Index Writeback Invalidate SLTU AT,T0,T1 BNE AT,R0,80794D58 ADDIU T0,T0,0010 LUI T0,8000 ADDIU T1,T0,6000 ADDIU T1,T1,FFE0 //80794D74: CACHE 0000 (T0), I, Index Invalidate SLTU AT,T0,T1 BNE AT,R0,80794D74 ADDIU T0,T0,0020 JR A2 NOP 80794D8C: treats 800002C0 like active codelist, setting 1 code: write 3F80->800BA3DC LUI A0,8000 ORI A0,A0,02C0 ;A0=800002C0: treated here like active codelist; also special hook, which is odd... ADDIU A1,R0,0001 SW A1,0000 (A0) ;00000001->800002C0 LUI A1,810B ORI A1,A1,A3DC ;A1=810BA3DC SW A1,0004 (A0) ;810BA3DC->800002C4 ADDIU A1,R0,3F80 SH A1,0008 (A0) ;3F80->800002C8 JR RA NOP 80794DB8 "ern int (now .." 80794DC8 ")" 80794DD0-80794E20 pointer table: ??? 80794E20 ' ' 80794E21 '\0' 80794E22 '\r' 80794E23 "char *strcpy(" 80794E30-80794EB0 pointer table: ??? 80794EB0 "0123456789ABCDEF" 80794EC8-80795018 pointer table: menu strings 80795018-80795904 strings 80795904 p->??? A07C5C00 80795908 fill? "Main Men" 80795910-80795948 LCD screen bitpatterns; lacking 'P' command from shell... 0x0 1 ID; final entry FF 0x1 1 bitsample unset bits light up bars; pattern includes 7 bars and a dot; bit numbering: 01234567 4 | 10 3 5 | 08 20 2 | 04 1 6 | 02 40 0 7 | 01 80 ' ' 00000000 '.' 11111110 '0' 00100001 '1' 11111001 '2' 00010011 '3' 01010001 '4' 11001001 '5' 01000101 '6' 00000101 '7' 11110001 '8' 00000001 '9' 01000001 'E' 00000111 'F' 10000111 'H' 10001001 'L' 00101111 'O' 00100001 'R' 10000001 'a' 01111111 'b' 10111111 'c' 11011111 'd' 11101111 'e' 11110111 'f' 11111011 'g' 11111101 'z' 01010111 00 11111111 default value FF 00000000 end of list marker 80795948 80795950 prev.w.LCD 80795954 80795958 8079595C TRUE on PC acknowledgment 80799CF0 current LCD display 80799CF4 current LCD timer 80799D00 hardware address range 80799D04 hardware bank 80799E20 pointer table: menu text 8079A000-8079A040 original game's VI registers 8079A040-8079A080 another set of org. VI registers 8079A080 codelist state (0-on;1-off) 8079A150 p->start of dynamic memory region 8079A154 p->end of dynamic memory region 8079A160-8079A1B0 PIF buffer 8079A1B0 p->PIF buffer 8079B1D0 8079B1EC COP0 Status 8079B250 cur.text colour 8079B32C cur.text xpos 8079B330 cur.text ypos 807C5C00 codelist ASM 807C9C00 +_+ codegen runtime memory A07E9C00 p->active codelist A07E9C04 codelist state (0-on;1-off) A07E9C88 option # selected on return to previous menu A07E9C8C A07E9C90 current memory editor address A07E9C94 A07E9C98 current nibble (0-0x10) A07E9C9C current row (0-?) A07E9CA0 cursor = nibble (0) or byte (1) A07E9CA4 A07E9CA8 "goto address" in memory editor A07E9CAC maximum memory editor address A07E9CB0 minimum memory editor address A07E9CB4 A07E9CB8 A07E9CC0 A07E9CC4 A07E9CC8 p->code search result addresses A07E9CCC p->active codelist codes A07E9CD0 p->[A07EA040] A07E9CD4 p->[A07EA0E4] A07E9CDC A07E9CE0 A07E9CEC # possibilites from search A07E9CF0 integer search value A07E9D34 text search string, NULL terminated A07E9D5C ??? forces using invalid memory editor addresses A07E9D60 active codelist: # codes in list A07E9D64 active codelist: codes A07E9EAC list of addresses displayed in code generator A07EA040 ??? A07EA0E4 ???